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TPL5110 Datasheet(PDF) 8 Page - Texas Instruments

No. de pieza TPL5110
Descripción Electrónicos  TPL5110 Nano-power System Timer for Power Gating
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Fabricante Electrónico  TI1 [Texas Instruments]
Página de inicio  http://www.ti.com
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TPL5110 Datasheet(HTML) 8 Page - Texas Instruments

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LOW FREQUENCY
OSCILLATOR
FREQUENCY
DIVIDER
EN/
ONE_SHOT
DRV
VDD
GND
DELAY/
M_DRV
DECODER
&
MANUAL RESET
DETECTOR
LOGIC
CONTROL
DONE
8
TPL5110
SNAS650 – JANUARY 2015 – REVISED JANUARY 2015
www.ti.com
Product Folder Links: TPL5110
Submit Documentation Feedback
Copyright © 2015, Texas Instruments Incorporated
8 Detailed Description
8.1 Overview
The TPL5110 is a timer with power gating feature. It is ideal for use in power-cycled applications and provides
selectable timing from 100ms to 7200s.
Once configured in timer mode (EN/ONE_SHOT= HIGH) the TPL5110 periodically sends out a DRV signal to a
MOSFET to turn on the µC. If the µC replies with a DONE signal within the programmed time interval (tDRV) the
TPL5110 turns off the µC, otherwise the TPL5110 keeps the µC in the on state for a time equal to tDRV.
The TPL5110 can work also in a one shot mode (EN/ONE_SHOT= LOW). In this mode the DRV signal is sent
out just one time at the power on of the TPL5110 to turn on the µC. If the µC replies with a DONE signal within
the programmed time interval (tDRV) the TPL5110 turns off the µC, otherwise the TPL5110 keeps the µC in the
on state for a time equal to tDRV.
8.2 Functional Block Diagram
8.3 Feature Description
The TPL5110 implements a periodical power gating feature or one shot power gating according to the
EN/ONE_SHOT voltage. A manual MOSFET Power ON function is realized by momentarily pulling the
DELAY/M_DRV pin to VDD.
8.3.1 DRV
The gate of the MOSFET is connected to the DRV pin. When DRV= LOW, the MOSFET is turned ON. The pulse
generated at DRV is equal to the selected time interval period, minus 50ms. It is shorter in the case of a DONE
signal received from the µC. If the DONE signal is not received within the programmed time interval (minus
50ms), the DRV signal will be high for the last 50ms of the time interval in order to turn off the MOSFET before
the next cycle starts.
The default value (after resistance reading) is HIGH. The signal is sent out from the TPL5110 when the
programmed time interval starts. When the DRV is LOW, the manual power ON signal is ignored.
8.3.2 DONE
The DONE pin is driven by a µC to signal that the µC is working properly. The TPL5110 recognizes a valid
DONE signal as a low to high transition; if two or more DONE signals are received within the time interval, only
the first DONE signal is processed. The minimum DONE signal pulse length is 100ns. When the TPL5110
receives the DONE signal it asserts DRV logic HIGH.


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