RESET

GND

MR

1

2

3

6

5

4

C

T

SENSE

V

DD

RESET

GND

MR

6

5

4

V

DD

SENSE

C

T

1

2

3

TPS3808G01-Q1, TPS3808G12-Q1, TPS3808G125-Q1, TPS3808G15-Q1

TPS3808G18-Q1, TPS3808G30-Q1, TPS3808G33-Q1, TPS3808G50-Q1

www.ti.com

SBVS085I – JANUARY 2007 – REVISED JUNE 2015

5 Device Comparison Table

ORDERABLE PART NUMBER

NOMINAL SUPPLY VOLTAGE

TPS3808G01QDRVRQ1

Adjustable

0.405 V

TPS3808G01QDBVRQ1

TPS3808G12QDBVRQ1

1.2 V

1.12 V

TPS3808G125QDBVRQ1

1.25 V

1.16 V

TPS3808G15QDBVRQ1

1.5 V

1.4 V

TPS3808G18QDBVRQ1

1.8 V

1.67 V

TPS3808G30QDBVRQ1

3 V

2.79 V

TPS3808G33QDBVRQ1

3.3 V

3.07 V

TPS3808G50QDBVRQ1

5 V

4.65 V

6 Pin Configuration and Functions

DBV Package

DRV Package

6-Pin SOT-23

6-Pin SON

Top View

Top View

Pin Functions

PIN

I/O

DESCRIPTION

NAME

NO.

4

I

open results in fixed delay times (see Electrical Characteristics). Connecting this pin to a ground

referenced capacitor

≥ 100 pF gives a user-programmable delay time.

GND

2

—

Ground

MR

3

I

Reset. This is an open-drain output that is driven to a low impedance state when RESET is asserted

RESET

1

O

logic high. A pullup resistor from 10 k

Ω to 1 MΩ should be used on this pin, and allows the reset pin to

Voltage sense. This pin is connected to the voltage to be monitored. If the voltage at this terminal drops

SENSE

5

I

6

I

Supply voltage. It is good analog design practice to place a 0.1-

μF ceramic capacitor close to this pin.

Copyright © 2007–2015, Texas Instruments Incorporated

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Product Folder Links: TPS3808G01-Q1 TPS3808G12-Q1 TPS3808G125-Q1 TPS3808G15-Q1 TPS3808G18-Q1

TPS3808G30-Q1 TPS3808G33-Q1 TPS3808G50-Q1