TPS3820, TPS3823, TPS3823A, TPS3824, TPS3825, TPS3828

www.ti.com

SLVS165K – APRIL 1998 – REVISED NOVEMBER 2015

Feature Description (continued)

8.3.4 Watchdog Timer (WDI)

TPS3820/3/4/8 devices have a watchdog timer that must be periodically triggered by either a positive or negative

transition at WDI to avoid a reset signal being issued. When the supervising system fails to retrigger the

reinitializes the watchdog timer.

The watchdog timer can be disabled by disconnecting the WDI pin from the system. If the WDI pin detects that it

is in a high-impedance state the TPS3820/3/4/8 will generate its own WDI pulse to ensure that RESET does not

assert. If this behavior is not desired place a 1k

Ω resistor from WDI to ground. This resistor will help ensure that

the TPS3820/3/4/8 detects that WDI is not in a high-impedance state.

In applications where the input to the WDI pin is active (transitioning high and low) when the TPS3820/3/4/8 is

requires that input to WDI be active when the reset signal is asserted, then either the A version of the device

should be used or a FET to decouple the WDI signal. The A version does not latch the reset signal to the

asserted state if a WDI pulse is received while RESET is asserted. An external FET decouples the WDI signal by

disconnecting the WDI input when RESET is asserted. For more details on this, see Decoupling WDI During

Reset Event for more details. The A version of the device does not need this FET but does operate in circuits

that have it. Therefore, the A version is backwards-compatible with the non-A versions.

8.4 Device Functional Modes

Table 1. Function Table

INPUTS

OUTPUTS

RESET

L

0

L

H

L

1

L

H

H

0

L

H

H

1

H

L

(1)

TPS3820/3/5/8

(2)

TPS3824/5

Copyright © 1998–2015, Texas Instruments Incorporated

Submit Documentation Feedback

11

Product Folder Links: TPS3820 TPS3823 TPS3824 TPS3825 TPS3828