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TPS54361QDPRTQ1 Datasheet(PDF) 3 Page - Texas Instruments

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No. de pieza TPS54361QDPRTQ1
Descripción Electrónicos  TPS54361-Q1 4.5-V to 60-V Input, 3.5-A, Step Down DC-DC Converter with Soft-Start and Eco-mode
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Fabricante Electrónico  TI1 [Texas Instruments]
Página de inicio  http://www.ti.com
Logo TI1 - Texas Instruments

TPS54361QDPRTQ1 Datasheet(HTML) 3 Page - Texas Instruments

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BOOT
VIN
EN
SS/TR
RT/CLK
PWRGD
SW
GND
COMP
FB
10
9
1
2
3
4
5
8
7
6
TPS54361-Q1
www.ti.com
SLVSCC4A – APRIL 2014 – REVISED APRIL 2014
6 Pin Configuration and Functions
10-Pin SON With PowerPAD
DPR Package
(Top View)
Pin Functions
PIN
I/O
DESCRIPTION
NAME
NO.
A bootstrap capacitor is required between BOOT and SW. If the voltage on this capacitor is below the
BOOT
1
O
minimum required to operate the high-side MOSFET, the gate drive is switched off until the capacitor is
refreshed.
This pin is the error amplifier output and input to the output switch current (PWM) comparator. Connect
COMP
7
O
frequency compensation components to this pin.
This pin is the enable pin, with an internal pullup current source. Pull EN below 1.2 V to disable. Float EN
EN
3
I
to enable. Adjust the input undervoltage lockout with two resistors. See the Enable and Adjust
Undervoltage Lockout section.
FB
6
I
This pin is the Inverting input of the transconductance (gm) error amplifier.
GND
8
Ground
VIN
2
I
This pin is the input supply voltage with 4.5-V to 60-V operating range.
The PWRGD pin is an open drain output that asserts low if the output voltage is out of regulation because
PWRGD
10
O
of thermal shutdown, dropout, over-voltage, or EN shut down.
This pin is the resistor timing and external clock pin. An internal amplifier holds this pin at a fixed voltage
when using an external resistor to ground to set the switching frequency. If the pin is pulled above the PLL
RT/CLK
5
I
upper threshold, a mode change occurs and the pin becomes a synchronization input. The internal
amplifier is disabled and the pin is a high impedance clock input to the internal PLL. If clocking edges stop,
the internal amplifier is re-enabled and the operating mode returns to resistor frequency programming.
This pin is the soft-start and tracking pin. An external capacitor connected to this pin sets the output rise
SS/TR
4
I
time. Because the voltage on this pin overrides the internal reference, SS/TR can be used for tracking and
sequencing.
SW
9
O
The SW pin is the source of the internal high-side power MOSFET and switching node of the converter.
The GND pin must be electrically connected to the exposed pad on the printed circuit board for proper
Thermal Pad
operation.
Copyright © 2014, Texas Instruments Incorporated
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