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TPS54972PWPRG4 Datasheet(PDF) 10 Page - Texas Instruments |
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TPS54972PWPRG4 Datasheet(HTML) 10 Page - Texas Instruments |
10 / 19 page AGND BOOT VSENSE COMP PWRGD PH PH PH PH PH PH PH PH PH RT ENA REFIN VBIAS VIN VIN VIN VIN VIN PGND PGND PGND PGND PGND VOUT PH VIN TOPSIDE GROUND AREA VIA to Ground Plane ANALOG GROUND TRACE EXPOSED POWERPAD AREA COMPENSATION NETWORK OUTPUT INDUCTOR OUTPUT FILTER CAPACITOR BOOT CAPACITOR INPUT BYPASS CAPACITOR INPUT BULK FILTER RESISTOR DIVIDER NETWORK BIAS CAPACITOR TRACKING VOLTAGE TPS54972 SLVS437B – AUGUST 2002 – REVISED AUGUST 2010 www.ti.com Connect the boot capacitor between the phase node and the BOOT pin as shown. Keep the boot capacitor close to the IC and minimize the conductor trace lengths. Connect the output filter capacitor(s) as shown between the VOUT trace and PGND. It is important to keep the loop formed by the PH pins, Lout, Cout and PGND as small as is practical. Place the compensation components from the VOUT trace to the VSENSE and COMP pins. Do not place these components too close to the PH trace. Do to the size of the IC package and the device pin-out, they will have to be routed somewhat close, but maintain as much separation as possible while still keeping the layout compact. Connect the bias capacitor from the VBIAS pin to analog ground using the isolated analog ground trace. If an RT resistor is used, connect them to this trace as well. Figure 9. TPS54972 PCB Layout 10 Submit Documentation Feedback Copyright © 2002–2010, Texas Instruments Incorporated |
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