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TPS56300 Datasheet(PDF) 10 Page - Texas Instruments |
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TPS56300 Datasheet(HTML) 10 Page - Texas Instruments |
10 / 40 page TPS56300 DUALOUTPUT LOW INPUT VOLTAGE DSP POWER SUPPLY CONTROLLER WITH SEQUENCING SLVS261B − DECEMBER 1999 − SEPTEMBER 2000 10 www.ti.com electrical characteristics TJ = −40° to 125°C, VCC = 2.8 V to 5.5 V (unless otherwise noted) high-side VDS sensing PARAMETER CONDITIONS MIN TYP MAX UNITS Gain 2 V/V Initial accuracy VHISENSE = 3.3 V, VIOUTLO = 3.2 V, Differential input to Vds sensing amp = 100 mV 194 208 mV Common-mode rejection ratio VHISENSE=2.8 V to 5.5 V, VHISENSE− VIOUTLO=100 mV 69 75 dB Sink current (IOUTLO) 2.8 V < VIOUTLO < 5.5 V 250 nA Source current (IOUT) VIOUT = 0.5 V, VHISENSE=3.3 V, VIOUTLO=2.8 V 500 µA Sink current (IOUT) VIOUT = 0.05 V, VHISENSE=3.35 V, VIOUTLO=3.3 V 50 µA VHISENSE=5.5 V, RIOUT = 10 kΩ 0 1.75 Output voltage swing VHISENSE=4.5 V, RIOUT = 10 kΩ 0 1.5 V Output voltage swing VHISENSE=3 V, RIOUT = 10 kΩ 0 0.75 V LOSENSE high level input voltage VHISENSE=2.8 V, See Note 2 1.77 V LOSENSE low level input voltage VHISENSE=2.8 V, See Note 2 1.49 V LOSENSE high level input voltage VHISENSE=4.5 V, See Note 2 2.85 V LOSENSE low level input voltage VHISENSE=4.5 V, See Note 2 2.4 V LOSENSE high level input voltage VHISENSE=5.5 V, See Note 2 3.80 V LOSENSE low level input voltage VHISENSE=5.5 V, See Note 2 3.2 V VHISENSE = 6 V, See Note 2 70 90 Sample/hold resistance VHISENSE = 4.5 V, See Note 2 80 100 Ω Sample/hold resistance VHISENSE = 3.6 V, See Note 2 90 120 Ω VHISENSE = 2.8 V, See Note 2 120 180 VHISENSE = 2.55 V, VIOUTLO pulsed from 2.55 V to 2.45 V, 100 ns rise and fall times, See Note 2 4 Response time (measured from 90% of VHISENSE = 2.8 V, VIOUTLO pulsed from 2.8 V to 2.7 V, 100 ns rise and fall times, See Note 2 3.5 s Response time (measured from 90% of VIOUTLO to 90% of VIOUT) VHISENSE = 4.5 V, VIOUTLO pulsed from 4.5V to 4.4V, 100 ns rise and fall times, See Note 2 3 µs VHISENSE = 5.5 V, VIOUTLO pulsed from 5.5 V to 5.9 V, 100 ns rise and fall times, See Note 2 3 Short circuit protection rising edge delay LOSENSE grounded, See Note 2 300 500 ns Sample/hold switch turnon/turnoff delay 2.8V < VHISENSE < 5.5V, VLOSENSE = VHISENSE, See Note 2 30 100 ns NOTE 2. Ensured by design, not production tested. |
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