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TPS56428RHLT Datasheet(PDF) 3 Page - Texas Instruments |
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TPS56428RHLT Datasheet(HTML) 3 Page - Texas Instruments |
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3 / 30 page  POWER PAD TPS56428 DDA HSOP8 SW VBST PG VFB GND 8 2 3 4 1 EN VREG5 7 6 5 VIN 12 1 14 11 10 5 13 9 8 7 4 3 2 6 VREG5 GND VREG5 EN PG VFB VFB SW SW VBST GND Exposed Thermal Pad TPS56428 www.ti.com SLVSBV4B – APRIL 2013 – REVISED OCTOBER 2015 5 Device Comparison Table TA PART NUMBER PINS HSOP (DDA) VQFN (RHL) –40°C to 85°C TPS56428 8 14 6 Pin Configuration and Functions 8-Pin HSOP with Thermal Pad 14-Pin VQFN with Thermal Pad DDA PACKAGE RHL Package (Top View) (Top View) Pin Functions PIN DESCRIPTION NUMBER NAME DDA RHL EN 1 9 Enable input control. Active high. Active high and must be pulled up to enable the device. VFB 2 10 Converter feedback input. Connect to output voltage with feedback resistor divider. VREG5 3 11, 12 5.5 V power supply output. A capacitor (typical 0.47 µF) should be connected to GND. VREG5 is not active when EN is low. PG 4 13 Open drain power good output. GND 5 1, 2, 3, 14 Ground pin. Power ground return for switching circuit. Connect sensitive SS and VFB returns to GND at a single point. Connect all four GND pins together on a PCB trace as short as possible. SW 6 4, 5 Switch node connection between high-side NFET and low-side NFET. Connect two SW pins together on a PCB trace. VBST 7 6 Supply input for the high-side FET gate drive circuit. Connect 0.1µF capacitor between VBST and SW pins. An internal diode is connected between VREG5 and VBST. VIN 8 7, 8 Input voltage supply pin. Connect two VIN pins together on a PCB trace as short as possible. Exposed Back side Back side Thermal pad of the package. Must be soldered to achieve appropriate dissipation. Must be Thermal Pad connected to GND. Copyright © 2013–2015, Texas Instruments Incorporated Submit Documentation Feedback 3 Product Folder Links: TPS56428 |
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