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TPS60121 Datasheet(PDF) 5 Page - Texas Instruments |
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TPS60121 Datasheet(HTML) 5 Page - Texas Instruments |
5 / 29 page TPS60130, TPS60131, TPS60132, TPS60133 REGULATED 5V, 300 mA HIGH EFFICIENCY CHARGE PUMP DC/DC CONVERTERS SLVS258A − NOVEMBER 1999 − REVISED DECEMBER 1999 5 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 adaptive mode switching (continued) The voltage on the flying capacitors is measured and compared with the supply voltage VI. If the voltage across the flying capacitors is smaller than half of the supply voltage, then the charge pump switches into the 1.5x conversion-mode. The charge pump switches back from a 1.5x conversion-mode to a voltage doubler mode if the load current in 1.5x conversion-mode can no more be delivered. With this control mode the device runs in doubler -mode at low VI and in 1.5x conversion-mode at high VI to optimize the efficiency. The most desirable transfer mode is automatically selected depending on both VI and IL. This means that at light loads the device selects the 1.5x conversion-mode already at smaller supply voltages than at heavy loads. The TPS60130 output voltage is regulated using the ACTIVE-CYCLE-regulation. An active cycle controlled charge pump utilizes two methods to control the output voltage. At high load currents it varies the on-resistances of the internal switches and keeps the ratio ON/OFF time (=frequency) constant. That means the charge pump runs at a fixed frequency. It also keeps the output voltage ripple as low as in linear-mode. At light loads the internal resistance and also the amount of energy transferred per pulse is fixed and the charge pump regulates the voltage by means of a variable ratio of ON-to-OFF time. In this operating point it runs like a skip mode controlled charge pump with a very high internal resistance, which also enables a low ripple in this operation mode. Since the charge pump does effectively switch at lower frequencies at light loads, it achieves a low quiescent current. pulse-skip mode In pulse-skip mode the error amplifier disables switching of the power stages when it detects an output higher than 5 V. The oscillator halts and the IC then skips switching cycles until the output voltage drops below 5 V. The error amplifier reactivates the oscillator and starts switching the power stages again. The pulse-skip regulation mode minimizes operating current because it does not switch continuously and deactivates all functions except bandgap reference, error amplifier, and low-battery/power-good comparator when the output is higher than 5 V. When switching is disabled from the error amplifier, the load is also isolated from the input. In pulse-skip mode, a special current control circuitry, limits the peak current. This assures moderate output voltage ripple and also prevents the device from drawing excessive current spikes out of the battery. start-up procedure During start-up, i.e. when ENABLE is set from logic low to logic high, the output capacitor is charged up, with a limited current, until the output voltage VO reaches 0.8 × VI. When the start-up comparator detects this voltage limit, the IC begins switching. This start-up charging of the output capacitor assures a short start-up time and eliminates the need of a Schottky diode between IN and OUT. The IC starts with a maximum load, which is defined by a 16- Ω or 33-Ω resistor, respectively. shutdown Driving ENABLE low places the device in shutdown mode. This disables all switches, the oscillator, and control logic. The device typically draws 0.05 µA (1 µA max) of supply current in this mode. Leakage current drawn from the output is as low as 1 µA max. The device exits shutdown once ENABLE is set to a high level. The typical no-load shutdown exit time is 10 µs. When the device is in shutdown, the load is isolated from the input. undervoltage lockout The TPS6013x devices have an undervoltage lockout feature that deactivates the device and places it in shutdown mode when the input voltage falls below 1.6 V. low-battery detector (TPS60130 and TPS60132) The internal low-battery comparator trips at 1.21 V ±5% when the voltage on pin LBI ramps down. The battery voltage at which the comparator initiates a low battery warning at the LBO output can easily be programmed with a resistive divider as shown in Figure 3. The sum of resistors R1 and R2 is recommended to be in the 100-k Ω to 1-M Ω range. |
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