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TPS61236P Datasheet(PDF) 4 Page - Texas Instruments |
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TPS61236P Datasheet(HTML) 4 Page - Texas Instruments |
4 / 38 page 4 TPS61235P, TPS61236P SLVSCK4A – SEPTEMBER 2015 – REVISED MAY 2016 www.ti.com Product Folder Links: TPS61235P TPS61236P Submit Documentation Feedback Copyright © 2015–2016, Texas Instruments Incorporated (1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods my affect device reliability. (2) All voltages are with respect to network ground terminal. 7 Specifications 7.1 Absolute Maximum Ratings over operating free-air temperature range (unless otherwise noted) (1) MIN MAX UNIT Voltage(2) VIN, EN, VOUT, CC, INACT, FB –0.3 6 V SW –0.3 7 V Operating junction temperature, TJ –40 150 °C Storage temperature, Tstg –65 150 °C (1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. (2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process. 7.2 ESD Ratings VALUE UNIT V(ESD) Electrostatic discharge Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) ±4000 V Charged-device model (CDM), per JEDEC specification JESD22- C101(2) ±1500 (1) The maximum input voltage should be 0.6-V lower than the output voltage in Constant Voltage operation for the TPS6123x to function correctly. (2) Effective capacitance value. Ceramic capacitor’s derating effect under bias should be considered when selecting capacitors. 7.3 Recommended Operating Conditions MIN NOM MAX UNIT VIN (1) Supply voltage at VIN pin 2.3 VOUT – 0.6 V VOUT Target output voltage (TPS61235P) 5.1 V Target output voltage (TPS61236P) 2.9 5.5 V L Effective inductance 0.7 1 1.3 µH CI Effective input capacitance(2) 4.7 10 µF CO Effective output capacitance (2) 20 µF CRCC Capacitor parallel with the RCC resistor connected at CC pin 1 10 nF RINACT INACT pin pull up resistance 1 MΩ REN EN pin pull down resistance 1 MΩ TJ Operating junction temperature –40 125 °C (1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report. 7.4 Thermal Information THERMAL METRIC(1) TPS61235P UNIT TPS61236P RWL (VQFN) 9 PINS RθJA Junction-to-ambient thermal resistance 28.7 °C/W RθJC(top) Junction-to-case(top) thermal resistance 24.1 °C/W RθJB Junction-to-board thermal resistance 10.9 °C/W ψJT Junction-to-top characterization parameter 0.1 °C/W ψJB Junction-to-board characterization parameter 10.8 °C/W RθJC(bottom) Junction-to-case(bottom) thermal resistance 1.6 °C/W |
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