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TPS61300YFFR Datasheet(PDF) 24 Page - Texas Instruments

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No. de Pieza. TPS61300YFFR
Descripción  TPS6130xx 1.5-A and 4.1-A Multiple LED Camera Flash Driver With I2C Compatible Interface
Descarga  70 Pages
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Fabricante  TI1 [Texas Instruments]
Página de inicio  http://www.ti.com
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TPS61300YFFR Datasheet(HTML) 24 Page - Texas Instruments

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VoltageModeRequest
OutputVoltage, VOUT
Nom. Voltage
Start-upphase
PowerGoodBit, (PG)
PowerGoodOutput,
GPIO/PG
Hi-Z
Hi-Z
1.025 VOUT (NOM)
0.985 VOUT (NOM)
VOUT (NOM)
OutputVoltage
DownRegulation
OutputVoltage
UpRegulation
ForcedPWMmodeoperation
ForcedPWMmodeoperation
(PG) Bit
24
TPS61300, TPS61301
TPS61305, TPS61305A, TPS61306
SLVS957E – JUNE 2009 – REVISED APRIL 2016
www.ti.com
Product Folder Links: TPS61300 TPS61301 TPS61305
Submit Documentation Feedback
Copyright © 2009–2016, Texas Instruments Incorporated
8.3.4 Power Good (Flash Ready)
The TPS6130xx integrates a power good circuitry that is activated when the device is operating in voltage
regulation mode (MODE_CTRL[1:0] = 11 or ENVM = 1). In shutdown mode (MODE_CTRL[1:0] = 00, ENDCL = 0
and ENVM = 0), the GPIO/PG pin state is defined in Table 5.
Table 5. GPIO Connection
GPIOTYPE
GPIO/PG SHUTDOWN STATE
0
Reset/pulled to ground
1
Open-drain
Depending on the GPIO/PG output stage type selection (push-pull or open-drain), the polarity of the power-good
output signal (PG) can be inverted or not. The power-good software bit and hardware signal polarity is defined in
Table 6.
Table 6. GPIO and PG Status
GPIOTYPE
PG BIT
GPIO/PG OUTPUT PORT
COMMENTS
0: push-pull output
0
0
Output is active high signal
polarity
1
1
1: open-drain output
0
Open-drain
Output is active low signal
polarity
1
Low
The power good signal is valid when the output voltage is within –1.5% and 2.5% of its nominal value.
Conversely, it is asserted low when the voltage mode operation gets suspended (MODE_CTRL[1:0]
≠ 11 and
ENVM = 0).
Figure 37. Power Good Operation (DIR = 1, GPIOTYPE = 1)
The TPS6130xx device uses a control architecture that allows recycling of excessive energy that might be stored
in the output capacitor. By reversing the operation of the boost power stage, the converter is capable of
transferring energy from its output back into the input source. In this case, the power good signal is deasserted
whilst the output voltage is decreasing towards its target value. For example the closest fit voltage the converter
can support. See Down-Mode in Voltage Regulation Mode for additional information.


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