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TPS61300YFFR Datasheet(HTML) 32 Page - Texas Instruments
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PFMrippleabout 0.015 xV
TPS61305, TPS61305A, TPS61306
SLVS957E – JUNE 2009 – REVISED APRIL 2016
Product Folder Links: TPS61300 TPS61301 TPS61305
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Copyright © 2009–2016, Texas Instruments Incorporated
8.4.3 Power-Save Mode Operation, Efficiency
The TPS6130xx device integrates a power save mode to improve efficiency at light load. In power save mode
the converter only operates when the output voltage trips below a set threshold voltage. It ramps up the output
voltage with one or several pulses and goes again into power save mode once the output voltage exceeds the
set threshold voltage.
Figure 45. Operation in PFM Mode and Transfer to PWM Mode
The power save mode can be enabled and disabled through the ENPSM bit. In down-conversion mode, power
save mode is always active and the device cannot be forced into fixed frequency operation at light loads.
The LED sense voltage has a direct effect on the converter’s efficiency. Because the voltage across the low-side
current regulator does not contribute to the output power (LED brightness), the lower the sense voltage the
higher the efficiency will be.
In direct drive mode (HC_SEL = L), the energy is being directly transferred from the battery to the LEDs. The
integrated current control loop automatically selects the minimum boosting ratio to maintain regulation based on
the LED forward voltage and current requirements. The low-side current regulators will be dropping the voltage
difference between the input voltage and the LEDs forward voltage (V
). When running in boost mode
), the voltage present at the LED1–3 pins of the low-side current regulators will be typically 400 mV
leading to high power conversion efficiency. Depending on the input voltage and the LEDs forward voltage
characteristic the converter will show efficiency in the range of about 75% to 90%.
In high-current mode (HC_SEL = H), the device is only supplying a limited amount of energy directly from the
battery (DC light, contribution to flash current or voltage regulation mode). During a flash strobe, the bulk of the
energy supplied to the LEDs is provided by the reservoir capacitor. The low-side current regulators will be
typically operating with 400-mV headroom voltage. This means the power losses in the device increase and
special care must be taken for thermal considerations.
8.4.4 Mode of Operation: DC Light and Flashlight
Operation is understood best by referring to the timer block diagram. Depending on the settings of
MODE_CTRL[1:0] bits the device can enter 4 different operating modes. Table 8 details the converter’s operation
for ENVM = 0.
Table 8. Converter Operation for ENVM = 0
The device is in shutdown mode.
The device is regulating the LED current to the DC light current level (DCLC bits) regardless of the FLASH_SYNC
input and START_FLASH/TIMER (SFT) bit. To avoid device shutdown by DC light safety timeout,
MODE_CTRL[1:0] needs to be refreshed within less than 11.2 s.
The flashlight pulse can be either trigger by a hardware signal (FLASH_SYNC) or by a software bit (SFT). LED
strobe pulse follows FLASH_SYNC.
The device is regulating a constant output voltage according to OV[3:0] bits settings. The low-side LED1–3 current
sinks are disabled and the LEDs are disconnected from the output. In this operating mode, the safety timer is
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