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TPS61300YFFR Datasheet(PDF) 8 Page - Texas Instruments

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No. de Pieza. TPS61300YFFR
Descripción  TPS6130xx 1.5-A and 4.1-A Multiple LED Camera Flash Driver With I2C Compatible Interface
Descarga  70 Pages
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Fabricante  TI1 [Texas Instruments]
Página de inicio  http://www.ti.com
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TPS61300YFFR Datasheet(HTML) 8 Page - Texas Instruments

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TPS61300, TPS61301
TPS61305, TPS61305A, TPS61306
SLVS957E – JUNE 2009 – REVISED APRIL 2016
www.ti.com
Product Folder Links: TPS61300 TPS61301 TPS61305
Submit Documentation Feedback
Copyright © 2009–2016, Texas Instruments Incorporated
Electrical Characteristics (continued)
Unless otherwise noted the specification applies for VIN = 3.6 V over an operating junction temperature TJ = –40°C to 125°C;
Circuit of (unless otherwise noted). Typical values are for TJ = 25°C.
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
(2)
Settling time to ±15% of the target value.
I(LKG)
Logic input leakage current
Input connected to VIN or GND
–40°C
≤ TJ ≤ 85°C
0.01
0.1
μA
RPD
ENVM pull-down resistance
ENVM
≤ 0.4 V
350
k
ENDCL, NRESET pull-down
resistance
ENDCL, NRESET
≤ 0.4 V
350
FLASH_SYNC pull-down resistance
FLASH_SYNC
≤ 0.4 V
350
Tx-MASK pull-down resistance
Tx-MASK
≤ 0.4 V
350
HC_SEL pull-down resistance
HC_SEL
≤ 0.4 V
350
C(IN)
SDA input capacitance
SDA = VIN or GND
9
pF
SCL input capacitance
SCL = VIN or GND
4
GPIO/PG input capacitance
DIR = 0, GPIO/PG = VIN or GND
9
ENVM input capacitance
ENVM = VIN or GND
4
ENDCL input capacitance
ENDCL = VIN or GND
3
HC_SEL input capacitance
HC_SEL = VIN or GND
3.5
Tx-MASK input capacitance
Tx-MASK = VIN or GND
4
FLASH_SYNC input capacitance
FLASH_SYNC = VIN or GND
3
TIMING
tNRESET Reset pulse width
10
μs
Start-up time
From shutdown into DC light mode
HC_SEL = 0, ILED = 100 mA
1.4
ms
From shutdown into voltage mode through
ENVM, HC_SEL = 0, IOUT = 0 mA
550
μs
LED current settling time(2) triggered
by a rising edge on FLASH_SYNC
MODE_CTRL[1:0] = 10, HC_SEL = 0
ILED2 = from 0 mA to 800 mA
400
μs
MODE_CTRL[1:0] = 10, HC_SEL = 1
ILED2 = from 0 mA to 1800 mA
16
LED current settling time(2) triggered
by Tx-MASK
MODE_CTRL[1:0] = 10, HC_SEL = 0
ILED2 = from 800 mA to 350 mA
15
μs
7.6 Timing Requirements
PARAMETER
TEST CONDITIONS
MIN
MAX
UNIT
f(SCL)
SCL clock frequency
Standard mode
100
kHz
Fast mode
400
High-speed mode (write operation),
CB – 100 pF maximum
3.4
MHz
High-speed mode (read operation),
CB – 100 pF maximum
3.4
High-speed mode (write operation),
CB – 400 pF maximum
1.7
High-speed mode (read operation),
CB – 400 pF maximum
1.7
tBUF
Bus free time between a STOP and START
condition
Standard mode
4.7
µs
Fast mode
1.3
tHD, tSTA
Hold time (repeated) START condition
Standard mode
4
µs
Fast mode
600
ns
High-speed mode
160


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