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TPS62060DSGR Datasheet(PDF) 8 Page - Texas Instruments |
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TPS62060DSGR Datasheet(HTML) 8 Page - Texas Instruments |
8 / 26 page TPS62060, TPS62061, TPS62063 SLVSA95B – MARCH 2010 – REVISED JULY 2015 www.ti.com 8.3 Feature Description 8.3.1 Mode Selection The MODE pin allows mode selection between forced PWM mode and power save mode. Connecting this pin to GND enables the power save mode with automatic transition between PWM and PFM mode. Pulling the MODE pin high forces the converter to operate in fixed frequency PWM mode even at light load currents. This allows simple filtering of the switching frequency for noise sensitive applications. In this mode, the efficiency is lower compared to the power save mode during light loads. The condition of the MODE pin can be changed during operation and allows efficient power management by adjusting the operation mode of the converter to the specific system requirements. 8.3.2 Enable The device is enabled by setting EN pin to high. At first, the internal reference is activated and the internal analog circuits are settled. Afterwards, the soft start is activated and the output voltage is ramped up. The output voltages reaches 95% of its nominal value within tSTART of typically 500 µs after the device has been enabled. The EN input can be used to control power sequencing in a system with various DC-DC converters. The EN pin can be connected to the output of another converter, to drive the EN pin high and getting a sequencing of supply rails. With EN = GND, the device enters shutdown mode. In this mode, all circuits are disabled and the SW pin is connected to PGND through an internal resistor to discharge the output. 8.3.3 Clock Dithering To reduce the noise level of switch frequency harmonics in the higher RF bands, the TPS6206x family has a built-in clock-dithering circuit. The oscillator frequency is slightly modulated with a sub clock causing a clock dither of typically 6 ns. 8.3.4 Undervoltage Lockout The undervoltage lockout circuit prevents the device from malfunctioning at low input voltages and from excessive discharge of the battery. It disables the output stage of the converter once the falling VIN trips the undervoltage lockout threshold VUVLO. The undervoltage lockout threshold VUVLO for falling VIN is typically 1.78 V. The device starts operation once the rising VIN trips undervoltage lockout threshold VUVLO again at typically 1.95 V. 8.3.5 Thermal Shutdown As soon as the junction temperature, TJ, exceeds 150°C (typical) the device goes into thermal shutdown. In this mode, the high-side and low-side MOSFETs are turned off. The device continues its operation when the junction temperature falls below the thermal shutdown hysteresis. 8.4 Device Functional Modes 8.4.1 Soft Start The TPS6206x has an internal soft start circuit that controls the ramp up of the output voltage. Once the converter is enabled and the input voltage is above the undervoltage lockout threshold VUVLO the output voltage ramps up from 5% to 95% of its nominal value within tRamp of typically 250 µs. This limits the inrush current in the converter during start-up and prevents possible input voltage drops when a battery or high impedance power source is used. During soft start, the switch current limit is reduced to 1/3 of its nominal value ILIMF until the output voltage reaches 1/3 of its nominal value. Once the output voltage trips this threshold, the device operates with its nominal current limit ILIMF. 8 Submit Documentation Feedback Copyright © 2010–2015, Texas Instruments Incorporated Product Folder Links: TPS62060 TPS62061 TPS62063 |
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