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LMS1485MX Datasheet(PDF) 2 Page - National Semiconductor (TI) |
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LMS1485MX Datasheet(HTML) 2 Page - National Semiconductor (TI) |
2 / 10 page Connection Diagram 8-Pin SOIC 20048802 Top View Ordering Information Package Part Number Package Marking Transport Media NSC Drawing 8-Pin SOIC LMS1485M LMS1485M 95 Units/Rail M08A LMS1485MX 2.5k Units Tape and Reel LMS1485IM LMS1485IM 95 Units/Rail LMS1485IMX 2.5k Units Tape and Reel Pin Descriptions Pin # I/O Name Function 1 O RO Receiver Output: If A > B by 200 mV, RO will be high; If A < B by 200mV, RO will be low. RO will be high also if the inputs (A and B) are open (non-terminated) 2I RE Receiver Output Enable: RO is enabled when RE is low; RO is in TRI-STATE when RE is high 3 I DE Driver Output Enable: The driver outputs (A and B) are enabled when DE is high; they are in TRI-STATE when DE is low. Pins A and B also function as the receiver input pins (see below) 4 I DI Driver Input: A low on DI forces A low and B high while a high on DI forces A high and B low when the driver is enabled 5 N/A GND Ground 6 I/O A Non-inverting Driver Output and Receiver Input pin. Driver Output levels conform to RS-485 signaling levels 7 I/O B Inverting Driver Output and Receiver Input pin. Driver Output levels conform to RS-485 signaling levels 8 N/A V CC Power Supply: 4.75V ≤ V CC ≤ 5.25V Truth Table DRIVER SECTION RE DE DI A B XH H H L XH L L H XL X Z Z RECEIVER SECTION RE DE A-B RO LL ≥ +0.2V H LL ≤ −0.2V L HX X Z L L OPEN * H Note: * = Non Terminated, Open Input only X = Irrelevant Z = TRI-STATE H = High level L = Low level www.national.com 2 |
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