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TPS2376PW Datasheet(PDF) 7 Page - Texas Instruments

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No. de Pieza. TPS2376PW
Descripción  IEEE 802.3af PoE POWERED DEVICE CONTROLLERS
Descarga  21 Pages
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Fabricante  TI [Texas Instruments]
Página de inicio  http://www.ti.com
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TPS2376PW Datasheet(HTML) 7 Page - Texas Instruments

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TPS2375
TPS2376
TPS2377
SLVS525A – APRIL 2004 – REVISED SEPTEMBER 2004
The CLASS pin must not be shorted to ground.
DET: Connect a resistor, R(DET), between DET and VDD. This resistor should equal 24.9 kΩ, ±1% for most
applications. R(DET) is connected across the input line when V(VDD) lies between 1.4 V and 11.3 V, and is
disconnected when the line voltage exceeds this range to conserve power. This voltage range has been chosen
to allow detection with two silicon rectifiers between the controller and the RJ-45 connector.
VSS: This is the input supply negative rail that serves as a local ground to the TPS2375.
RTN: This pin provides the switched negative power rail used by the downstream circuits. The operational and
inrush current limit control current into the pin. The PG circuit monitors the RTN voltage and also uses it as the
return for the PG pin pulldown transistor. The internal MOSFET body diode clamps VSS to RTN when voltage is
present between VDD and RTN and the PoE input is not present.
PG: This pin goes to a high resistance state when the internal MOSFET that feeds the RTN pin is enabled, and
the device is not in inrush current limiting. In all other states except detection, the PG output is pulled to RTN by
the internal open-drain transistor. Performance is assured with at least 4 V between VDD and RTN.
PG is an open-drain output; therefore, it may require a pullup resistor or other interface.
UVLO: This pin is specific to the TPS2376; it is not internally connected on the TPS2375 and TPS2377. The
UVLO pin is used with an external resistor divider between VDD and VSS to set the upper and lower UVLO
thresholds. The hysteresis, as measured as a percentage of the upper UVLO, is the same as the TPS2375.
The TPS2376 enables the output when V(UVLO) exceeds the upper UVLO threshold. When current begins to flow,
VDD sags due to cable resistance and the dynamic resistance of the input diodes. The lower UVLO threshold
must be below the lowest voltage that the input reaches.
The TPS2376 implements adjustable UVLO thresholds, but is otherwise functionally equivalent to the TPS2375.
The TPS2375 offers fixed UVLO thresholds designed to maximize hysteresis while maintaining compatibility with
the IEEE 802.3af standard. The TPS2377 offers fixed UVLO thresholds optimized for use with legacy PoE
systems.
VDD: This is the positive input supply to the TPS2375, which is also common to downstream load circuits. This
pin provides operating power and allows the controller to monitor the line voltage to determine the mode of
operation.
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