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TPS650940A0RSKR Datasheet(PDF) 8 Page - Texas Instruments |
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TPS650940A0RSKR Datasheet(HTML) 8 Page - Texas Instruments |
8 / 92 page 8 TPS65094, TPS650940, TPS650941, TPS650942, TPS650944 SWCS133A – SEPTEMBER 2015 – REVISED JUNE 2016 www.ti.com Submit Documentation Feedback Product Folder Links: TPS65094 Pin Configuration and Functions Copyright © 2015–2016, Texas Instruments Incorporated Table 4-1. Pin Functions (continued) NO. NAME I/O SUPPLY, OP VOLTAGE LEVEL DESCRIPTION 44 FBVOUT6 I Remote feedback sense for BUCK6 controller. Connect to positive terminal of output capacitor. 45 ILIM6 I Current limit set pin for BUCK6 controller. Fit a resistor from this pin to ground to set current limit of external low-side FET. 64 ILIM2 I Current limit set pin for BUCK2 controller. Fit a resistor from this pin to ground to set current limit of external low-side FET. LDO and LOAD SWITCHES 9 LDOA1 O 1.35–3.3 V LDOA1 output. Bypass to ground with a 4.7-µF (typical) ceramic capacitor. Leave floating when not in use. 17 SWB1 O 0.5–3.3 V (1.8-V Typical) Output of load switch B1. Bypass to ground with a 0.1-µF (typical) ceramic capacitor. Short with SWB2. 18 PVINSWB1_B2 I 0.5–3.3 V (1.8-V Typical) Power supply to load switch B1 and B2. Bypass to ground with a 1-µF (typical) ceramic capacitor to improve transient performance. Connect to ground when not in use. 19 SWB2 O 0.5–3.3 V (1.8-V Typical) Output of load switch B2. Bypass to ground with a 0.1-µF (typical) ceramic capacitor. Short with SWB1. Leave floating when not in use. 31 SWA1 O 0.5–3.3 V Output of load switch A1. Bypass to ground with a 0.1-µF (typical) ceramic capacitor. Leave floating when not in use. 32 PVINSWA1 I 0.5–3.3 V Power supply to load switch A1. Bypass to ground with a 1-µF (typical) ceramic capacitor to improve transient performance. Connect to ground when not in use. 46 PVINVTT I VDDQ Power supply to VTT LDO. Bypass to ground with a 10-µF (minimum) ceramic capacitor. Connect to ground when not in use. 47 VTT O VDDQ / 2 Output of load VTT LDO. Bypass to ground with 2× 22-µF (minimum) ceramic capacitors. Leave floating when not in use. 48 VTTFB I VDDQ / 2 Remote feedback sense for VTT LDO. Connect to positive terminal of output capacitor. Leave floating when not in use. 49 LDOA3 O 0.7–1.5 V Output of LDOA3. Bypass to ground with a 4.7-µF (typical) ceramic capacitor. Leave floating when not in use. 50 PVINLDOA2_A3 I 1.8 V Power supply to LDOA2 and LDOA3. Bypass to ground with a 4.7-µF (typical) ceramic capacitor. Connect to ground when not in use. 51 LDOA2 O 0.7–1.5 V Output of LDOA2. Bypass to ground with a 4.7-µF (typical) ceramic capacitor. Leave floating when not in use. 54 LDO3P3 O 3.3 V Output of 3.3-V internal LDO. Bypass to ground with a 4.7-µF (typical) ceramic capacitor. 56 LDO5P0 O 5 V Output of 5-V internal LDO or an internal switch that connects this pin to V5ANA. Bypass to ground with a 4.7-µF (typical) ceramic capacitor. 57 V5ANA I 5 V External 5-V supply input to internal load switch that connects this pin to LDO5P0 pin. Bypass this pin with an optional ceramic capacitor to improve transient performance. |
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