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TPS7325QDG4 Datasheet(PDF) 8 Page - Texas Instruments

No. de pieza TPS7325QDG4
Descripción Electrónicos  LOW-DROPOUT VOLTAGE REGULATORS WITH INTEGRATED DELAYED RESET FUNCTION
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Fabricante Electrónico  TI1 [Texas Instruments]
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TPS7325QDG4 Datasheet(HTML) 8 Page - Texas Instruments

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TPS7301Q, TPS7325Q, TPS7330Q, TPS7333Q, TPS7348Q, TPS7350Q
LOW-DROPOUT VOLTAGE REGULATORS
WITH INTEGRATED DELAYED RESET FUNCTION
SLVS124F – JUNE 1995 – REVISED JANUARY 1999
8
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
TPS7301Q electrical characteristics at IO = 10 mA, VI = 3.5 V, EN = 0 V, Co = 4.7 µF (CSR= 1 Ω), FB
shorted to OUT at device leads (unless otherwise noted)
PARAMETER
TEST CONDITIONS‡
TJ
MIN
TYP
MAX
UNIT
25
°C
1.182
V
Reference voltage (measured at FB)
2.5 V
≤ VI ≤ 10 V,
See Note 1
5 mA
≤ IO ≤ 500 mA,
–40
°C to 125°C
1.147
1.217
V
Reference voltage temperature
coefficient
–40
°C to 125°C
61
75
ppm/
°C
VI =2 4V
50
µA ≤ IO ≤ 150 mA
25
°C
0.7
1
VI = 2.4 V,
50
µA ≤ IO ≤ 150 mA
–40
°C to 125°C
1
VI =2 4V
150 mA
≤ IO ≤ 500 mA
25
°C
0.83
1.3
Pass-element series resistance
VI = 2.4 V,
150 mA
≤ IO ≤ 500 mA
–40
°C to 125°C
1.3
(See Note 2)
VI =2 9V
50
µA ≤ IO ≤ 500 mA
25
°C
0.52
0.85
VI = 2.9 V,
50
µA ≤ IO ≤ 500 mA
–40
°C to 125°C
0.85
VI = 3.9 V,
50
µA ≤ IO ≤ 500 mA
25
°C
0.32
VI = 5.9 V,
50
µA ≤ IO ≤ 500 mA
25
°C
0.23
Input regulation
VI = 2.5 V to 10 V,
50
µA ≤ IO ≤ 500 mA,
25
°C
3
18
mV
Input regulation
I
,
See Note 1
µ
O
,
–40
°C to 125°C
25
mV
2.5 V
≤ VI ≤ 10 V,
IO = 5 mA to 500 mA,
25
°C
5
14
mV
Output regulation
I
,
See Note 1
O
,
–40
°C to 125°C
25
mV
Output regulation
2.5 V
≤ VI ≤ 10 V,
IO = 50 µA to 500 mA,
25
°C
7
22
mV
I
,
See Note 1
O
µ
,
–40
°C to 125°C
54
mV
IO =50 µA
25
°C
48
59
Ripple rejection
f = 120 Hz
IO = 50 µA
–40
°C to 125°C
44
dB
Ripple rejection
f = 120 Hz
IO = 500 mA,
25
°C
45
54
dB
O
,
See Note 1
–40
°C to 125°C
44
Output noise-spectral density
f = 120 Hz
25
°C
2
µV/√Hz
Co = 4.7 µF
25
°C
95
Output noise voltage
10 Hz
≤ f ≤ 100 kHz
Co = 10 µF
25
°C
89
µVrms
Co = 100 µF
25
°C
74
RESET trip-threshold voltage§
VO(FB) decreasing
–40
°C to 125°C
1.101
1.145
V
RESET hysteresis voltage§
Measured at VO(FB)
25
°C
12
mV
RESET output low voltage§
VI = 2 13 V
IO(RESET) = 400 µA
25
°C
0.1
0.4
V
RESET output low voltage§
VI = 2.13 V,
IO(RESET) = 400 µA
–40
°C to 125°C
0.4
V
FB input current
25
°C
–10
0.1
10
nA
FB input current
–40
°C to 125°C
–20
20
nA
† CSR refers to the total series resistance, including the ESR of the capacitor, any series resistance added externally, and PWB trace resistance
to Co.
‡ Pulse-testing techniques are used to maintain virtual junction temperature as close as possible to ambient temperature; thermal effects must
be taken into account separately.
§ Output voltage programmed to 2.5 V with closed-loop configuration (see application information).
NOTES:
1. When VI < 2.9 V and IO > 150 mA simultaneously, pass element rDS(on) increases (see Figure 33) to a point where the resulting
dropout voltage prevents the regulator from maintaining the specified tolerance range.
2. To calculate dropout voltage, use equation: VDO = IO rDS(on)
rDS(on) is a function of both output current and input voltage. This parametric table lists rDS(on) for VI = 2.4 V, 2.9 V, 3.9 V, and
5.9 V, which corresponds to dropout conditions for programmed output voltages of 2.5 V, 3 V, 4 V, and 6 V respectively. For other
programmed values, refer to Figure 33.


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