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Power-Good

Manual Reset Pins (MR1 and MR2)

FB1 and FB2

RESET Indicator

TPS70745, TPS70748

TPS70751, TPS70758

TPS70702

SLVS291D – MAY 2000 – REVISED DECEMBER 2007

state when it is pulled below 95% (for example, doing an overload condition) of its regulated voltage. The open

drain output of the PG1 terminal requires a pull-up resistor.

MR1 and MR2 are active low input terminals used to trigger a reset condition. When either MR1 or MR2 is pulled

to logic low, a POR (RESET) occurs. These terminals have a 6-

µA pull-up current to V

The sense terminals of fixed-output options must be connected to the regulator output, and the connection

should be as short as possible. Internally, sense connects to high-impedance, wide-bandwidth amplifiers through

a resistor-divider network and noise pickup feeds through to the regulator output. It is essential to route the

regulators to oscillate.

FB1 and FB2 are input terminals used for adjustable-output devices and must be connected to the external

feedback resistor divider. FB1 and FB2 connections should be as short as possible. It is essential to route them

terminals to filter noise is not recommended because these networks can cause the regulators to oscillate.

The TPS707xx features a RESET (SVS, POR, or Power-On Reset). RESET can be used to drive power-on reset

circuitry or a low-battery indicator. RESET is an active low, open drain output that indicates the status of the

and MR1 and MR2 are in the high impedance state, RESET goes to a high-impedance state after 120ms delay.

output of the RESET terminal requires a pullup resistor. If RESET is not used, it can be left floating.

Copyright © 2000–2007, Texas Instruments Incorporated

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