TPS92660

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SLUSBC2 – APRIL 2013

THERMAL INFORMATION

TPS92660

TSSOP exposed

UNITS

pad (PWP)

20 PINS

36.9

22.7

18.6

°C/W

0.6

18.4

1.9

.

(1)

For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.

(2)

The junction-to-ambient thermal resistance under natural convection is obtained in a simulation on a JEDEC-standard, high-K board, as

specified in JESD51-7, in an environment described in JESD51-2a.

(3)

The junction-to-case (top) thermal resistance is obtained by simulating a cold plate test on the package top. No specific JEDEC-

standard test exists, but a close description can be found in the ANSI SEMI standard G30-88.

(4)

The junction-to-board thermal resistance is obtained by simulating in an environment with a ring cold plate fixture to control the PCB

temperature, as described in JESD51-8.

(5)

The junction-to-top characterization parameter,

from the simulation data for obtaining

(6)

The junction-to-board characterization parameter,

from the simulation data for obtaining

(7)

The junction-to-case (bottom) thermal resistance is obtained by simulating a cold plate test on the exposed (power) pad. No specific

JEDEC standard test exists, but a close description can be found in the ANSI SEMI standard G30-88.

Spacer

.

RECOMMENDED OPERATING CONDITIONS

over operating free-air temperature range (unless otherwise noted)

MIN

MAX

UNIT

Input Voltage

8.6

80

V

2.7

5.5

V

Output voltage sense for control and protection

0

2.5

V

Enable/Under Voltage lock-out

0

5.5

V

Switching regulator analog or PWM LED current adjust

0

5.5

V

Linear regulator analog or PWM LED current adjust

0

5.5

V

Resistor and capacitor sets switching frequency of device

0

5.5

V

Operating junction temperature

–40

125

°C

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