2

CAT5411

Document No. 2114, Rev. F

takes the SO output pin to high impedance and forces the devices into a Standby mode (unless an internal write operation is

underway). The CAT5411 draws ZERO current in the Standby mode. A high to low transition on

CS is required prior to any

sequence being initiated. A low to high transition on

CS after a valid write sequence is what initiates an internal write cycle.

WP

WP

WP

WP

WP:

Write Protect

WP is the Write Protect pin. The Write Protect pin will allow normal read/write operations when held high. When WP is tied low, all

non-volatile write operations to the Data registers are inhibited (change of wiper control register is allowed).

WP going low while

CS is still low will interrupt a write to the registers. If the internal write cycle has already been initiated, WP going low will have no

effect on any write operation.

HOLD

HOLD

HOLD

HOLD

HOLD: Hold

The

HOLD pin is used to pause transmission to the CAT5411 while in the middle of a serial sequence without having to re-

transmit entire sequence at a later time. To pause,

HOLD must be brought low while SCK is low. The SO pin is in a high imped-

ance state during the time the part is paused, and transitions on the SI pins will be ignored. To resume communication,

HOLD is

brought high, while SCK is low. (

HOLD should be held high any time this function is not being used.) HOLD may be tied high

directly to VCC or tied to VCC through a resistor.

PIN DESCRIPTIONS

SI:

Serial Input

SI is the serial data input pin. This pin is used to input

all opcodes, byte addresses and data to be written to

the CAT5411. Input data is latched on the rising edge

of the serial clock.

SO:

Serial Output

SO is the serial data output pin. This pin is used to

transfer data out of the CAT5411. During a read

cycle, data is shifted out on the falling edge of the

serial clock.

SCK:

Serial Clock

SCK is the serial clock pin. This pin is used to

synchronize the communication between the

microcontroller and the CAT5411. Opcodes, byte

addresses or data present on the SI pin are latched

on the rising edge of the SCK. Data on the SO pin is

updated on the falling edge of the SCK.

A0, A1: Device Address Inputs

These inputs set the device address when address-

ing multiple devices. A total of four devices can be

addressed on a single bus. A match in the slave

address must be made with the address input in

order to initiate communication with the CAT5411.

connections on a mechanical potentiometer.

Wiper

mechanical potentiometer.

CS

CS

CS

CS

CS:

Chip Select

CS is the Chip select pin. CS low enables the

CAT5411 and

CS high disables the CAT5411. CS high

PIN DESCRIPTION

Pin

Pin

Pin

(SOIC)(TSSOP)(BGA)Name

Function

1

19

C1

VCC

Supply Voltage

220

B1

Low Reference Terminal

for Potentiometer 0

321

C2

High Reference Terminal

for Potentiometer 0

422

A1

Wiper Terminal for Potentiometer 0

523

A2

CS

Chip Select

624

B2

WP

Write Protection

7

1

B3

SI

Serial Input

8

2

A3

A1

Device Address

93

A4

Low Reference Terminal

for Potentiometer 1

10

4

C3

High Reference Terminal

for Potentiometer 1

11

5

B4

Wiper Terminal for Potentiometer 1

12

6

C4

GND

Ground

13

7

D4

NC

No Connect

14

8

E4

NC

No Connect

15

9

D3

NC

No Connect

16

10

F4

NC

No Connect

17

11

F3

SCK

Bus Serial Clock

18

12

E3

HOLD

Hold

19

13

E2

SO

Serial Data Output

20

14

F2

A0

Device Address, LSB

21

15

F1

NC

No Connect

22

16

D2

NC

No Connect

23

17

E1

NC

No Connect

24

18

D1

NC

No Connect