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AD5354 Datasheet(PDF) 4 Page - Asahi Kasei Microsystems |
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AD5354 Datasheet(HTML) 4 Page - Asahi Kasei Microsystems |
4 / 19 page ASAHI KASEI [AK5354] MS0054-E-02 2004/12 - 4 - ANALOG CHARACTERISTICS (Ta=25 °C; VA, VD=2.5V; fs=44.1kHz; Signal Frequency=1kHz; Measurement frequency=10Hz ∼ 20kHz; unless otherwise specified) Parameter min typ max Units Resolution 20 bits Input PGA Characteristics (IPGA): Input Voltage (LIN1, LIN2, RIN1, RIN2) (Note 2) 1.35 1.5 1.65 Vpp Input Impedance 6.3 9 15 k Ω Step Width +28dB ∼ -8dB -8dB ∼ -16dB -16dB ∼ -32dB -32dB ∼ -40dB -40dB ∼ -52dB 0.1 0.1 0.1 - - 0.5 1 2 2 4 1 2 4 - - dB dB dB dB dB ADC Analog Input Characteristics: (Note 3) S/(N+D) (-0.5dBFS Input) 74 84 dB D-Range (EIAJ) 82 89 dB S/N (EIAJ) 82 89 dB Interchannel Isolation 90 100 dB Interchannel Gain Mismatch 0.2 0.5 dB Power Supplies Power Supply Current: VA+VD Normal Operation (PDN=“H”) IPGA+AD (PM0=1, PM1=1) Power Down (PDN=“L”) (Note 4) 7 10 10 100 mA µA Note: 2. Analog input voltage (full-scale voltage: IPGA = 0dB) scale with VREF. (IPGA = ADC = 0.6 x VREF) Note: 3. ADC is input from LIN1/RIN1 or LIN2/RIN2 and it measures included in IPGA. The value of IPGA is set 0dB. Internal HPF cancels the offset of IPGA and ADC. Note: 4. In case of power-down mode, all digital input pins including clocks pins (MCLK, BCLK and LRCK) are held VD or VSS. PDN pin is held VSS. |
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