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K6T4016V3C Datasheet(PDF) 5 Page - Samsung semiconductor |
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K6T4016V3C Datasheet(HTML) 5 Page - Samsung semiconductor |
5 / 9 page K6T4016V3C, K6T4016U3C Family CMOS SRAM Revision 2.01 October 2001 5 CL1) 1.Including scope and jig capacitance AC OPERATING CONDITIONS TEST CONDITIONS( Test Load and Input/Output Reference) Input pulse level: 0.4 to 2.2V Input rising and falling time: 5ns Input and output reference voltage: 1.5V Output load(see right): CL=100pF+1TTL CL=30pF+1TTL DATA RETENTION CHARACTERISTICS 1. Industrial product = 20 µA Item Symbol Test Condition Min Typ Max Unit Vcc for data retention VDR CS ≥Vcc-0.2V 2.0 - 3.6 V Data retention current IDR Vcc=3.0V, CS ≥Vcc-0.2V - 0.5 151) µA Data retention set-up time tSDR See data retention waveform 0 - - ms Recovery time tRDR 5 - - AC CHARACTERISTICS (K6T4016V3C Family: Vcc=3.0~3.6V, K6T4016U3C Family: Vcc=2.7~3.3V Commercial product: TA=0 to 70 °C, Industrial product: TA=-40 to 85°C) Parameter List Symbol Speed Bins Units 55ns 70ns 85ns 100ns Min Max Min Max Min Max Min Max Read Read cycle time tRC 55 - 70 - 85 - 100 - ns Address access time tAA - 55 - 70 - 85 - 100 ns Chip select to output tCO - 55 - 70 - 85 - 100 ns Output enable to valid output tOE - 25 - 35 - 40 - 50 ns LB, UB valid to data output tBA - 25 - 35 - 40 - 50 ns Chip select to low-Z output tLZ 10 - 10 - 10 - 10 - ns Output enable to low-Z output tOLZ 5 - 5 - 5 - 5 - ns LB, UB enable to low-Z output tBLZ 5 - 5 - 5 - 5 - ns Output hold from address change tOH 10 - 10 - 10 - 15 - ns Chip disable to high-Z output tHZ 0 20 0 25 0 25 0 30 ns OE disable to high-Z output tOHZ 0 20 0 25 0 25 0 30 ns LB, UB disable to high-Z output tBHZ 0 20 0 25 0 25 0 30 ns Write Write cycle time tWC 55 - 70 - 85 - 100 - ns Chip select to end of write tCW 45 - 60 - 70 - 80 - ns Address set-up time tAS 0 - 0 - 0 - 0 - ns Address valid to end of write tAW 45 - 60 - 70 - 80 - ns Write pulse width tWP 40 - 55 - 60 - 70 - ns Write recovery time tWR 0 - 0 - 0 - 0 - ns Write to output high-Z tWHZ 0 20 0 25 0 25 0 30 ns Data to write time overlap tDW 25 - 30 - 35 - 40 - ns Data hold from write time tDH 0 - 0 - 0 - 0 - ns End write to output low-Z tOW 5 - 5 - 5 - 5 - ns LB, UB valid to end of write tBW 45 - 60 - 70 - 80 - ns |
Número de pieza similar - K6T4016V3C |
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