BU21023GUL BU21023MUV BU21024FV-M

5/17

TSZ02201-0L5L0F300840-1-2

© 2013 ROHM Co., Ltd. All rights reserved.

7.June.2016 Rev.004

www.rohm.com

TSZ22111・15・001

Block Diagram and Description of each Block

【BU21023GUL / BU21023MUV】

Panel

I/F

Regulator

Osc

ADC

(10bit)

CPU

(8bit)

Work

memory

Program

memory

EEPROM

I/F

Host

I/F

register

Clock

generator

CLK_EXT

XP

ECL

EDA

SEL_CSB

SCL_SCK

SDA_SI

SO

INT

YP

XN

YN

IFSEL

Screen I/F

4-wire resistive touch screen interface

ADC

10-bit A/D converter

OSC

Internal 20MHz oscillator block with optional external clock input

Regulator

Internal regulator provides 1.8V DVDD supply. DVDD can also be supplied from an

external source if DVDD_EXT pin is tied high.

Clock Generator

System clock and timing generation (10MHz CPU clock)

CPU Core

For dual touch processing, programmability and HOST interface

Work Memory

Data memory for CPU

Program Memory

Program memory for CPU. Code can be downloaded by HOST processor or from an

external EEPROM

EEPROM I/F

To connect to external EEPROM when downloading program memory from EEPROM.

Use of external EEPROM is optional.

Host I/F

4-wire SPI or 2-wire serial interface provides access to registers