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AD5543BR Datasheet(PDF) 2 Page - Analog Devices |
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AD5543BR Datasheet(HTML) 2 Page - Analog Devices |
2 / 12 page REV. A –2– AD5543/AD5553–SPECIFICATIONS (@ VDD = 5 V 10%, VSS = 0 V, IOUT = Virtual GND, GND = 0 V, VREF = 10 V, TA = Full operating temperature range, unless otherwise noted.) ELECTRICAL CHARACTERISTICS Parameter Symbol Condition 5 V 10% Unit STATIC PERFORMANCE 1 Resolution N 1 LSB = VREF/2 16 = 153 µV when V REF = 10 V AD5543 16 Bits 1 LSB = VREF/2 14 = 610 µV when VREF = 10 V AD5553 14 Bits Relative Accuracy INL Grade: AD5553C ±1LSB max Grade: AD5543B ±2LSB max Differential Nonlinearity DNL Monotonic ±1LSB max Output Leakage Current IOUT Data = 0000H, TA = 25 °C10 nA max Data = 0000H, TA = TA max 20 nA max Full-Scale Gain Error GFSE Data = FFFFH ±1/±4mV typ/max Full-Scale Tempco 2 TCVFS 1ppm/ °C typ REFERENCE INPUT VREF Range VREF –15/+15 V min/max Input Resistance RREF 5k Ω typ3 Input Capacitance 2 CREF 5pF typ ANALOG OUTPUT Output Current IOUT Data = FFFFH for AD5543 2 mA typ Data = 3FFFH for AD5553 Output Capacitance 2 COUT Code Dependent 200 pF typ LOGIC INPUTS AND OUTPUT Logic Input Low Voltage VIL 0.8 V max Logic Input High Voltage VIH 2.4 V min Input Leakage Current IIL 10 µA max Input Capacitance 2 CIL 10 pF max INTERFACE TIMING 2, 4 Clock Input Frequency fCLK 50 MHz Clock Width High tCH 10 ns min Clock Width Low tCL 10 ns min CS to Clock Setup tCSS 0 ns min Clock to CS Hold tCSH 10 ns min Data Setup tDS 5 ns min Data Hold tDH 10 ns min SUPPLY CHARACTERISTICS Power Supply Range VDD RANGE 4.5/5.5 V min/max Positive Supply Current IDD Logic Inputs = 0 V 10 µA max Power Dissipation PDISS Logic Inputs = 0 V 0.055 mW max Power Supply Sensitivity PSS ∆V DD = ±5% 0.006 %/% max AC CHARACTERISTICS 4 Output Voltage Settling Time tS To ±0.1% of Full Scale, 0.5 µs typ Data = 0000H to FFFFH to 0000H for AD5543 Data = 0000H to 3FFFH to 0000H for AD5553 Reference Multiplying BW BW VREF = 5 V p-p, Data = FFFFH 4 MHz typ DAC Glitch Impulse Q VREF = 0 V, Data = 7FFFH to 8000H for AD5543 7 nV-s typ Data = 1FFFH to 2000H for AD5553 Feedthrough Error VOUT/VREF Data = 0000H, VREF = 100 mV rms, same channel –65 dB Digital Feedthrough Q CS = 1, and f CLK = 1 MHz 7 nV-s typ Total Harmonic Distortion THD VREF = 5 V p-p, Data = FFFFH, f = 1 kHz –85 dB typ Output Spot Noise Voltage eN f = 1 kHz, BW = 1 Hz 12 nV/ √Hz NOTES 1All static performance tests (except I OUT) are performed in a closed-loop system using an external precision OP177 I-to-V converter amplifier. The AD5543 R FB terminal is tied to the amplifier output. The op amp +IN is grounded and the DAC I OUT is tied to the op amp –IN. Typical values represent average readings measured at 25 °C. 2These parameters are guaranteed by design and are not subject to production testing. 3All ac characteristic tests are performed in a closed-loop system using an AD841 I-to-V converter amplifier. 4All input control signals are specified with t R = tF = 2.5 ns (10% to 90% of 3 V) and timed from a voltage level of 1.5 V. |
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