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ADS8325IDRBR Datasheet(PDF) 11 Page - Burr-Brown (TI) |
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ADS8325IDRBR Datasheet(HTML) 11 Page - Burr-Brown (TI) |
11 / 21 page ADS8325 11 SBAS226A www.ti.com THEORY OF OPERATION The ADS8325 is a classic Successive Approximation Register (SAR) Analog-to-Digital (A/D) converter. The architecture is based on capacitive redistribution that inherently includes a sample-and- hold function. The converter is fabricated on a 0.6 µ CMOS process. The architecture and process allow the ADS8325 to acquire and convert an analog signal at up to 100,000 conver- sions per second while consuming less than 4.5mW from +VDD. The ADS8325 requires an external reference, an external clock, and a single power source (VDD). The external reference can be any voltage between 2.5V and 5.5V. The value of the reference voltage directly sets the range of the analog input. The reference input current depends on the conversion rate of the ADS8325. The external clock can vary between 24kHz (1kHz throughput) and 2.4MHz (100kHz throughput). The duty cycle of the clock is essentially unimportant as long as the minimum high and low times are at least 200ns (VDD = 4.75V or greater). The minimum clock frequency is set by the leakage on the internal capacitors to the ADS8325. The analog input is provided to two input pins: +IN and –IN. When a conversion is initiated, the differential input on these pins is sampled on the internal capacitor array. While a conversion is in progress, both inputs are disconnected from any internal function. The digital result of the conversion is clocked out by the DCLOCK input and is provided serially, most significant bit first, on the DOUT pin. The digital data that is provided on the DOUT pin is for the conversion currently in progress—there is no pipeline delay. It is possible to continue to clock the ADS8325 after the conversion is complete and to obtain the serial data least significant bit first. See the Digital Timing section for more information. ANALOG INPUT The analog input of ADS8325 is differential. The +IN and –IN input pins allow for a differential input signal. The amplitude of the input is the difference between the +IN and –IN input, or (+IN) – (–IN). Unlike some converters of this type, the –IN input is not resampled later in the conversion cycle. When the converter goes into the hold mode or conversion, the voltage difference between +IN and –IN is captured on the internal capacitor array. The range of the –IN input is limited to –0.3V to +0.5V. Due to this, the differential input could be used to reject signals that are common to both inputs in the specified range. Thus, the –IN input is best used to sense a remote signal ground that may move slightly with respect to the local ground potential. The general method for driving the analog input of the ADS8325 is shown in Figures 1 and 2. The –IN input is held at the common-mode voltage. The +IN input swings from –IN (or common-mode voltage) to –IN + VREF (or common- mode voltage + VREF), and the peak-to-peak amplitude is +VREF. The value of VREF determines the range over which the common-mode voltage may vary (see Figure 3). Figures 5 and 6 illustrate the typical change in gain and offset as a function of the common-mode voltage applied to the –IN pin. FIGURE 2. Methods of Driving the ADS8325 FIGURE 1. Differential Input Mode of the ADS8325. ADS8325 0V to +V REF Peak-to-Peak Common-Mode Voltage The input current required by the analog inputs depends on a number of factors: sample rate, input voltage, source impedance, and power-down mode. Essentially, the current into the ADS8325 charges the internal capacitor array during the sample period. After this capacitance has been fully charged, there is no further input current. The source of the analog input voltage must be able to charge the input capacitance (20pF) to a 16-bit settling level within 4.5 clock cycles (1.875 µs). When the converter goes into the hold mode, or while it is in the power-down mode, the input impedance is greater than 1G Ω. Common-Mode Voltage + V REF +V REF t +IN Common-Mode Voltage NOTE: The maximum differential voltage between +IN and –IN of the ADS8325 is V REF. See Figure 3 for a further explanation of the common-mode voltage range for differential inputs. –IN = Common-Mode Voltage |
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