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LM2792LD-H Datasheet(PDF) 4 Page - National Semiconductor (TI) |
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LM2792LD-H Datasheet(HTML) 4 Page - National Semiconductor (TI) |
4 / 10 page Absolute Maximum Ratings (Note 1) If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. V IN −0.3 to 6.0V BRGT, SD −0.3 to (V IN +0.2V) Power Dissipation (Note 2) 400 mW T JMAX (Note 2) 150˚C θ JA (Note 7) 55˚C/W Storge Temperature −65˚C to +150˚C Lead Temp. (Soldering, 5 sec.) 260˚C ESD Rating Human Body Model 2KV Machine Model 200V Operating Conditions Input Voltage (V IN) 3.0V to 5.8V BRGT 0 to 3.0V Ambient Temperature (T A) −30˚C to +85˚C 34mAOperating Junction Temperature −30˚C to 100˚C Electrical Characteristics Limits in standard typeface are for T J = 25˚C and limits in boldface type apply over the full Operating Temperature Range. Unless otherwise specified, C 1 =CIN =CHOLD = 1 µF, VIN = 3.6V, BRGT pin = 2.75V. Symbol Parameter Conditions Min Typ Max Units I DX Available Current at Output Dx 3.0V ≤ V IN ≤ 5.8V V Dx ≤ 3.6V R SET = 1650 Ω V BRGT =3V 14.5 16.8 mA I DX Line Regulation of Dx Output Current 3.0V ≤ V IN ≤ 4.4V V Dx ≤ 3.6V R SET = 1800 Ω V BRGT = 2.75V 13.5 16 17.8 mA V DX Load Regulation of Dx Output Current V IN = 3.6V V Dx = 3.0V V Dx = 4.0V R SET = 1800 Ω V BRGT = 2.75V 16.1 15.4 mA I D-MATCH Current Matching Between Any Two Outputs V D1 =VD2 = 3.6V, BRGT = 2.75V, V IN = 3.6V, R SET = 1800 Ω 0.3 % I Q Quiescent Supply Current 3.0V ≤ V IN ≤ 4.4V, Active, No Load Current 1.4 2.7 mA I SD Shutdown Supply Current 3.0V ≤ V IN ≤ 5.5V, Shutdown At 85˚C 0.1 0.3 1µA V IH SD Input Logic High 3.0V ≤ V IN ≤ 5.5V, Note5 0.8* V IN V V IL SD Input Logic Low 3.0V ≤ V IN ≤ 5.5V, Note5 0.2* V IN V I LEAK-SD SD Input Leakage Current 0V ≤ V SD ≤ V IN 0.01 µA R BRGT BRGT Input Resistance 250 k Ω BRGT Brightness Voltage Range 0 3.0 V I SET I SET Pin Output Current I Dx/25 mA f SW Switching Frequency (Note 4) 3.0V ≤ V IN ≤ 4.4V I D1 =ID2 ≤ 16mA 900 1100 1800 kHz t START Startup Time (Note 6) I Dx = 90% steady state 10 µs Note 1: Absolute maximum ratings indicate limits beyond which damage to the device may occur. Electrical specifications do not apply when operating the device beyond its rated operating conditions. Note 2: D1 and D2 may be shorted to GND without damage. POUT may be shorted to GND for 1sec without damage. Note 3: In the test circuit, all capacitors are 1.0µF, 0.3 Ω maximum ESR capacitors. Capacitors with higher ESR will increase output resistance, reduce output voltage and efficiency. Note 4: The output switches operate at one half of the oscillator frequency, fOSC =2fSW. Note 5: The internal thresholds of the Shutdown bar are set at about 40% of VIN Note 6: This electrical specification is quarantee by design Note 7: For more information regarding the LLP package, please refer to National Semiconductor Application note AN1187 www.national.com 4 |
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