[Note: This product is currently in development. As such, the parameters specified in this section are DESIGN TAR-

GETS. The specifications in this section cannot be guaranteed until device characterization has taken place.]

The following specifications apply after calibration for V

800mV

Extended Control Mode, R

T

Symbol

Parameter

Conditions

Typical

(Note 8)

Limits

(Note 8)

Units

(Limits)

AC ELECTRICAL CHARACTERISTICS

Pipeline Delay (Latency)

(Note 11)

DI Outputs

13

Input Clock

Cycles

DId Outputs

14

DQ Outputs

Normal Mode

13

Extended

Control Mode

13.5

DQd Outputs

Normal Mode

14

Extended

Control Mode

14.5

Over Range Recovery Time

Differential V

0V to get accurate conversion

TBD

ns

t

WU

PD low to Rated Accuracy

Conversion (Wake-Up Time)

500

ns

f

SCLK

Maximum Serial Clock Frequency

100

MHz

t

SSU

Data to Serial Clock Setup Time

(Note 12)

2.5

TBD

ns (min)

t

SH

Data to Serial Clock Hold Time

(Note 12)

1

TBD

ns (min)

Serial Clock Low Time

4

ns (min)

Serial Clock High Time

4

ns (min)

t

CAL

Calibration Cycle Time

1.4 x 10

5

Clock Cycles

Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. There is no guarantee of operation at the Absolute Maximum

Ratings. Operating Ratings indicate conditions for which the device is functional, but do not guarantee specific performance limits. For guaranteed specifications and

test conditions, see the Electrical Characteristics. The guaranteed specifications apply only for the test conditions listed. Some performance characteristics may

degrade when the device is not operated under the listed test conditions.

Note 2: All voltages are measured with respect to GND = DR GND = 0V, unless otherwise specified.

25 mA. The 50 mA maximum package input current rating limits the number of pins that can safely exceed the power supplies with an input current of 25 mA to two.

This limit is not placed upon the power, ground and digital output pins.

Note 4: Human body model is 100 pF capacitor discharged through a 1.5 k

Ω resistor. Machine model is 220 pF discharged through ZERO Ohms.

Note 5: See AN-450, “Surface Mounting Methods and Their Effect on Product Reliability”.

Note 6: The analog inputs are protected as shown below. Input voltage magnitudes beyond the Absolute Maximum Ratings may damage this device.

20097404

achieving rated performance requires that the backside exposed pad be well grounded.

Level).

Note 9: Calculation of Full-Scale Error for this device assumes that the actual reference voltage is exactly its nominal value. Full-Scale Error for this device,

therefore, is a combination of Full-Scale Error and Reference Voltage Error. See Figure 2. For relationship between Gain Error and Full-Scale Error, see Specification

Definitions for Gain Error.

Note 10: The analog and clock input capacitances are die capacitances only. Additional package capacitances of 0.65 pF differential and 0.95 pF each pin to ground

are isolated from the die capacitances by lead and bond wire inductances.

Note 11: This parameter is guaranteed by design and is not tested in production.

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