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TPS54262MPWPTEP Datasheet(PDF) 6 Page - Texas Instruments |
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TPS54262MPWPTEP Datasheet(HTML) 6 Page - Texas Instruments |
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6 / 48 page  6 TPS54262-EP SLVSDP3 – DECEMBER 2016 www.ti.com Product Folder Links: TPS54262-EP Submit Documentation Feedback Copyright © 2016, Texas Instruments Incorporated DC Electrical Characteristics (continued) VIN = 7 V to 48 V, EN = VIN, TJ = –55°C to 150°C (unless otherwise noted) PARAMETER TEST CONDITIONS TEST(1) MIN TYP MAX UNIT (2) This is the current flowing into the VReg pin when voltage at OV_TH pin is 1 V. ENABLE (EN) VIL Low input threshold voltage PT 0.7 V VIH High input threshold voltage PT 1.7 V Ilkg Leakage current into EN terminal EN = 60 V PT 100 135 µA EN = 12 V 8 15 RESET DELAY (Cdly) IO External capacitor charge current EN = high PT 1.4 2 3 µA VThreshold Switching threshold voltage Output voltage in regulation PT 2 V LOW-POWER MODE (LPM) VIL Low input threshold voltage VIN = 12 V PT 0.7 V VIH High input threshold voltage VIN = 12 V PT 1.7 V Ilkg Leakage current into LPM terminal LPM = 5 V PT 65 95 µA RESET OUTPUT (RST) trdly POR delay timer Based on Cdly capacitor PT 3.2 7 ms/nF VReg_RST Reset threshold voltage for VReg Check RST output PT 0.768 0.832 V tnRSTdly Filter time Delay before RST is asserted low PT 10 20 35 µs SOFT START (SS) ISS Soft-start source current PT 40 50 60 µA SYNCHRONIZATION (SYNC) VIL Low input threshold voltage PT 0.7 V VIH High input threshold voltage PT 1.7 V Ilkg Leakage current SYNC = 5 V PT 65 95 µA SYNC (fext) External input clock frequency VIN = 12 V, VReg = 5 V, 180 kHz < fsw < fext < 2 × fsw < 2.2 MHz CT 180 2200 kHz SYNCtrans External clock to internal clock No external clock, VIN = 12 V, VReg = 5 V Info 32 µs SYNCtrans Internal clock to external clock External clock = 1 MHz, VIN = 12 V, VReg = 5 V Info 2.5 µs SYNCCLK Minimum duty cycle CT 30% SYNCCLK Maximum duty cycle CT 70% Rslew IRslew Rslew = 50 k Ω CT 20 µA IRslew Rslew = 10 k Ω CT 100 µA OVERVOLTAGE SUPERVISORS (OV_TH) VReg_OV Threshold voltage for VReg during overvoltage Internal switch is turned off PT 0.768 0.832 V VReg = 5 V Internal pulldown on VReg, OV_TH = 1 V 70(2) mA THERMAL SHUTDOWN TSD Thermal shutdown junction temperature CT 175 °C THYS Hysteresis CT 30 °C |
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