MC54/74HC4351 MC54/74HC4353

High–Speed CMOS Logic Data

DL129 — Rev 6

5

MOTOROLA

Symbol

Parameter

VCC

V

Guaranteed Limit

Unit

Symbol

Parameter

VCC

V

– 55 to

25

_C

v 85_C

v 125_C

Unit

tsu

Minimum Setup Time, Channel–Select to Latch Enable

(Figure 12)

2.0

4.5

6.0

100

20

17

125

25

21

150

30

26

ns

th

Minimum Hold Time, Latch Enable to Channel Select

(Figure 12)

2.0

4.5

6.0

0

0

0

0

0

0

0

0

0

ns

tw

Minimum Pulse Width, Latch Enable

(Figure 12)

2.0

4.5

6.0

80

16

14

100

20

17

120

24

20

ns

tr, tf

Maximum Input Rise and Fall Times, Channel–Select, Latch Enable,

and Enables 1 and 2

2.0

4.5

6.0

1000

500

400

1000

500

400

1000

500

400

ns

NOTE: Information on typical parametric values can be found in Chapter 2 of the Motorola High–Speed CMOS Data Book (DL129/D).

Symbol

Parameter

Test Condition

VCC

V

VEE

V

Limit*

Unit

Symbol

Parameter

Test Condition

VCC

V

VEE

V

25

_C

54/74HC

Unit

BW

Maximum On–Channel Bandwidth or

Minimum Frequency Response

(Figure 6)

fin = 1 MHz Sine Wave

Adjust fin Voltage to Obtain 0 dBm at VOS

Increase fin Frequency Until dB Meter

Reads – 3 dB

RL = 50 Ω, CL = 10 pF

51

52

53

MHz

Minimum Frequency Response

(Figure 6)

Adjust fin Voltage to Obtain 0 dBm at VOS

Increase fin Frequency Until dB Meter

Reads – 3 dB

RL = 50 Ω, CL = 10 pF

2.25

4.50

6.00

– 2.25

– 4.50

– 6.00

80

95

120

80

95

120

80

95

120

—

Off–Channel Feedthrough Isolation

(Figure 7)

fin  Sine Wave

Adjust fin Voltage to Obtain 0 dBm at VIS

fin = 10 kHz, RL = 600 Ω, CL = 50 pF

2.25

4.50

6.00

– 2.25

– 4.50

– 6.00

– 50

– 50

– 50

dB

fin = 1.0 MHz, RL = 50 Ω, CL = 10 pF

2.25

4.50

6.00

– 2.25

– 4.50

– 6.00

– 40

– 40

– 40

—

Feedthrough Noise, Channel Select

Input to Common O/I

(Figure 8)

Vin v 1 MHz Square Wave

(tr = tf = 6 ns)

Adjust RL at Setup so that IS = 0 A

Enable = GND

RL = 600 Ω, CL = 50 pF

2.25

4.50

6.00

– 2.25

– 4.50

– 6.00

25

105

135

mVPP

RL = 10 kΩ, CL = 10 pF

2.25

4.50

6.00

– 2.25

– 4.50

– 6.00

35

145

190

—

Crosstalk Between Any Two Switches

(Figure 13)

(Test does not apply to HC4351)

fin  Sine Wave

Adjust fin Voltage to Obtain 0 dBm at VIS

fin = 10 kHz, RL = 600 Ω, CL = 50 pF

2.25

4.50

6.00

– 2.25

– 4.50

– 6.00

– 50

– 50

– 50

dB

fin = 1 MHz, RL = 50 Ω, CL = 10 pF

2.25

4.50

6.00

– 2.25

– 4.50

– 6.00

– 60

– 60

– 60

THD

Total Harmonic Distortion

(Figure 15)

fin = 1 kHz, RL = 10 kΩ, CL = 50 pF

THD = THDMeasured – THDSource

VIS = 4.0 VPP sine wave

VIS = 8.0 VPP sine wave

VIS = 11.0 VPP sine wave

2.25

4.50

6.00

– 2.25

– 4.50

– 6.00

0.10

0.08

0.05

%

* Limits not tested. Determined by design and verified by qualification.