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T89C5115-RATIM Datasheet(PDF) 60 Page - ATMEL Corporation |
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T89C5115-RATIM Datasheet(HTML) 60 Page - ATMEL Corporation |
60 / 105 page 60 T89C5115 4128A–8051–04/02 Table 38. T2MOD Register T2MOD (S:C9h) Timer 2 Mode Control Register Reset Value = XXXX XX00b Not bit addressable Table 39. TH2 Register TH2 (S:CDh) Timer 2 High Byte Register Reset Value = 0000 0000b Not bit addressable 76 54 32 1 0 -- --- - T2OE DCEN Bit Number Bit Mnemonic Description 7- Reserved The value read from this bit is indeterminate. Do not set this bit. 6- Reserved The value read from this bit is indeterminate. Do not set this bit. 5- Reserved The value read from this bit is indeterminate. Do not set this bit. 4- Reserved The value read from this bit is indeterminate. Do not set this bit. 3- Reserved The value read from this bit is indeterminate. Do not set this bit. 2- Reserved The value read from this bit is indeterminate. Do not set this bit. 1T2OE Timer 2 Output Enable bit Clear to program P1.0/T2 as clock input or I/O port. Set to program P1.0/T2 as clock output. 0 DCEN Down Counter Enable bit Clear to disable Timer 2 as up/down counter. Set to enable Timer 2 as up/down counter. 76 54 32 1 0 -- --- -- - Bit Number Bit Mnemonic Description 7-0 HighByteof Timer 2. |
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