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ADM2795EARWZ Datasheet(PDF) 4 Page - Analog Devices

No. de pieza ADM2795EARWZ
Descripción Electrónicos  Robust 5 kV RMS Isolated RS-485/RS-422 Transceiver with Level 4 EMC and Full 짹42 V Protection
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Fabricante Electrónico  AD [Analog Devices]
Página de inicio  http://www.analog.com
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ADM2795EARWZ Datasheet(HTML) 4 Page - Analog Devices

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ADM2795E
Data Sheet
Rev. 0 | Page 4 of 27
Parameter
Symbol
Min
Typ
Max
Unit
Test Conditions/Comments
Logic Outputs
Output Voltage Low
V
OLRxD
0.2
V
I
ORxD = 3.0 mA, VA − VB = −0.2 V
Output Voltage High
V
OHRxD
V
DD1 − 0.2
V
I
ORxD = −3.0 mA, VA − VB = 0.2 V
Short-Circuit Current
100
mA
V
OUT = GND or VDD1, RE = 0 V
Three-State Output Leakage Current
I
OZR
±2
µA
RE = VDD1, RxD = 0 V or VDD1
COMMON-MODE TRANSIENT IMMUNITY2
75
125
kV/µs
V
CM ≥1 kV, transient magnitude
≥800 V
1 V
SC is the short-circuit voltage at the RS-485 A or B bus pin.
2 Common-mode transient immunity is the maximum common-mode voltage slew rate that can be sustained while maintaining specification-compliant operation. V
CM
is the common-mode potential difference between the logic and bus sides. The transient magnitude is the range over which the common mode is slewed. The
common-mode voltage slew rates apply to both rising and falling common-mode voltage edges.
TIMING SPECIFICATIONS
VDD1 = 1.7 V to 5.5 V, VDD2 = 3.0 V to 5.5 V, TA = TMIN to TMAX (−40°C to +125°C), unless otherwise noted.
Table 2.
Parameter
Min
Typ
Max
Unit
Test Conditions/Comments
DRIVER1
Maximum Data Rate
2.5
Mbps
Propagation Delay, t
DPLH, tDPHL
30
500
ns
R
LDIFF = 54 Ω, CL1 = CL2 = 100 pF, see Figure 29 and Figure 33
Differential Skew, t
SKEW
10
50
ns
R
LDIFF = 54 Ω, CL1 = CL2 = 100 pF, see Figure 29 and Figure 33
Rise/Fall Times, t
R, tF
40
130
ns
R
LDIFF = 54 Ω, CL1 = CL2 = 100 pF, see Figure 29 and Figure 33
Enable Time, t
ZH, tZL
500
2500
ns
R
L = 110 Ω, CL = 50 pF, see Figure 30 and Figure 35
Disable Time, t
HZ, tLZ
500
2500
ns
R
L = 110 Ω, CL = 50 pF, see Figure 30 and Figure 35
RECEIVER2
Propagation Delay, t
PLH, tPHL
120
200
ns
C
L = 15 pF, see Figure 31 and Figure 34, 10, VID ≥ ±1.5 V
140
220
ns
C
L = 15 pF, see Figure 31 and Figure 34, VID ≥ ±600 mV
Skew, t
SKEW
4
40
ns
C
L = 15 pF, see Figure 31 and Figure 34, VID ≥ ±1.5 V
Enable Time
10
50
ns
R
L = 1 kΩ, CL = 15 pF, see Figure 32 and Figure 36
Disable Time
10
50
ns
R
L = 1 kΩ, CL = 15 pF, see Figure 32 and Figure 36
RxD Pulse Width Distortion
40
ns
C
L = 15 pF, see Figure 31 and Figure 34, VID ≥ ±1.5 V
1 See Figure 29 for the definition of R
LDIFF.
2 Receiver propagation delay, skew, and pulse width distortion specifications are tested with a receiver differential input voltage (V
ID) of ≥±600 mV or ≥±1.5 V, as noted.


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