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SI5345-44-42 Datasheet(PDF) 8 Page - Silicon Laboratories |
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SI5345-44-42 Datasheet(HTML) 8 Page - Silicon Laboratories |
8 / 62 page Si5345/44/42 8 Rev. 1.0 Table 4. Control Input Pin Specifications (VDD =1.8 V ±5%, VDDA =3.3 V ±5%, VDDS = 3.3 V ±5%, 1.8 V ±5%, TA = –40 to 85 °C) Parameter Symbol Test Condition Min Typ Max Unit Si5345 Control Input Pins (I2C_SEL, IN_SEL[1:0], RST, OE, A1, SCLK, A0/CS, FINC, FDEC, SDA/SDIO) Input Voltage VIL — — 0.3 x VDDIO * V VIH 0.7 x VDDIO * —— V Input Capacitance CIN —2 — pF Input Resistance RIN —20 — k Minimum Pulse Width PW RST, FINC and FDEC 50 — — ns Update Rate TUR FINC and FDEC 1 — — µs Si5344/42 Control Input Pins (I2C_SEL, IN_SEL[1:0], RST, OE, A1, SCLK, A0/CS, SDA/SDIO) Input Voltage VIL — — 0.3 x VDDIO * V VIH 0.7 x VDDIO * —— V Input Capacitance CIN —2 — pF Input Resistance RIN —20 — k Minimum Pulse Width PW RST 50 — — ns *Note: VDDIO is determined by the IO_VDD_SEL bit. It is selectable as VDDA or VDD. See the Si5345/44/42 Family Reference Manual for more details on the proper register settings. |
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