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Si8460BB-B-IS1 Datasheet(PDF) 8 Page - Silicon Laboratories |
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Si8460BB-B-IS1 Datasheet(HTML) 8 Page - Silicon Laboratories |
8 / 36 page Si8460/61/62/63 8 Rev. 1.5 Figure 1. Propagation Delay Timing All Models Output Rise Time tr CL =15pF See Figure 1 —3.8 5.0 ns Output Fall Time tf CL =15pF See Figure 1 —2.8 3.7 ns Common Mode Transient Immunity CMTI VI =VDD or 0 V — 25 — kV/µs Start-up Time3 tSU —15 40 µs Table 3. Electrical Characteristics (Continued) (VDD1 =5V±10%, VDD2 =5V±10%, TA = –40 to 125 °C; applies to narrow-body SOIC package) Parameter Symbol Test Condition Min Typ Max Unit Notes: 1. The nominal output impedance of an isolator driver channel is approximately 85 , ±40%, which is a combination of the value of the on-chip series termination resistor and channel resistance of the output driver FET. When driving loads where transmission line effects will be a factor, output pins should be appropriately terminated with controlled impedance PCB traces. 2. tPSK(P-P) is the magnitude of the difference in propagation delay times measured between different units operating at the same supply voltages, load, and ambient temperature. 3. Start-up time is the time period from the application of power to valid data at the output. Typical Input tPLH tPHL Typical Output tr tf 90% 10% 90% 10% 1.4 V 1.4 V |
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