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Si50122-A4-GMR Datasheet(Hoja de datos) 1 Page - Silicon Laboratories

No. de Pieza. Si50122-A4-GMR
Descripción  Network Attached Storage
Descarga  14 Pages
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Fabricante  SILABS [Silicon Laboratories]
Página de inicio  http://www.silabs.com
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Rev 0.7 9/14
Copyright © 2014 by Silicon Laboratories
Si50122-A3/A4
Si50122-A3/A4
C RYSTAL- LESS PCI-E XPRESS G EN 1 & G EN 2
D UAL O UTPUT C LOCK G ENERATOR
Features
Applications
Description
Si50122-A3/A4 is a high performance, crystal-less PCIe clock generator
that can generate two 100 MHz PCIe clock and one 25 MHz LVCMOS
clock outputs. The differential clock outputs are compliant to PCIe Gen1
and Gen 2 specifications. The ultra-small footprint (2.0x2.5 mm) and
industry leading low power consumption make Si50122-A3/A4 the ideal
clock solution for consumer and embedded applications where board
space is limited and low power is needed.
Functional Block Diagram
Crystal-less clock generator with
integrated CMEMS
PCI-Express Gen 1/2 compliant
Two PCIe 100 MHz differential
HCSL outputs
One 25 MHz single-ended
LVCMOS output
Supports Serial (ATA) at
100 MHz
Low power differential output
buffers
No termination resistors required
for differential output clocks
Triangular spread spectrum
profile for maximum EMI
reduction (Si50122-A4)
Industrial Temperature –40 to
85 °C
2.5 V, 3.3 V Power supply
Small package 10-pin TDFN
(2.0x2.5 mm)
Si50122-A3 does not support
spread spectrum outputs
Si50122-A4 supports 0.5% down
spread outputs
Digital TV
Set top box
Solid State Drives (SSD)
Wireless Access Point
Home Gateway
Network Attached Storage
Multi-function Printer
Wireless Access Point
Digital Video Cameras
Divider
VDD
CMEMS
REFOUT
PLL 
(SSC)
DIFF1
DIFF2
VSS
Patents pending
Ordering Information:
See page 10
Pin Assignments
10
9
8
7
1
2
3
4
VSS
REFOUT
NC
5
6
VSS
DIFF2
DIFF2
DIFF1
DIFF1
VDD
VDD




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