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LM5041MTCX Datasheet(PDF) 10 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor.
No. de pieza LM5041MTCX
Descripción Electrónicos  Cascaded PWM Controller
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Fabricante Electrónico  NSC [National Semiconductor (TI)]
Página de inicio  http://www.national.com
Logo NSC - National Semiconductor (TI)

LM5041MTCX Datasheet(HTML) 10 Page - National Semiconductor (TI)

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Detailed Operating Description
The LM5041 PWM controller contains all of the features
necessary to implement either current-fed or voltage-fed
push-pull or bridge power converters. These “Cascaded”
topologies are well suited for multiple output and higher
power applications. The LM5041’s four control outputs in-
clude: the buck stage controls (HD and LD) and the push-
pull control outputs (PUSH and PULL). Push-pull outputs are
driven at 50% nominal duty cycle at one half of the switching
frequency of the buck stage and can be configured for either
a guaranteed overlap time (for current-fed applications) or a
guaranteed both-off time (for voltage-fed applications).
Push-pull stage MOSFETs can be driven directly from the
internal gate drivers while the buck stage requires an exter-
nal driver such as the LM5102. The LM5041 includes a
high-voltage start-up regulator that operates over a wide
input range of 15V to 100V. The PWM controller is designed
for high-speed capability including an oscillator frequency
range up to 1 MHz and total propagation delays of less than
100ns. Additional features include: line Under-Voltage Lock-
out (UVLO), soft-start, an error amplifier, precision voltage
reference, and thermal shutdown.
High Voltage Start-Up Regulator
The LM5041 contains an internal high-voltage start-up regu-
lator, thus the input pin (Vin) can be connected directly to the
line voltage. The regulator output is internally current limited
to 15mA. When power is applied, the regulator is enabled
and sources current into an external capacitor connected to
the Vcc pin. The recommended capacitance range for the
Vcc regulator is 0.1uF to 100uF. When the voltage on the
Vcc pin reaches the regulation point of 9V and the internal
voltage reference (REF) reaches its regulation point of 5V,
the controller outputs are enabled. The Buck stage outputs
will remain enabled until Vcc falls below 7V or the line
Under-Voltage Lockout detector indicates that Vin is out of
range. The push-pull outputs continue switching until the
REF pin voltage falls below approximately 3V. In typical
applications, an auxiliary transformer winding is connected
through a diode to the Vcc pin. This winding must raise the
Vcc voltage above 9.3V to shut off the internal start-up
regulator. Powering V
CC from an auxiliary winding improves
efficiency while reducing the controller’s power dissipation.
The recommended capacitance range for the Vref regulator
output is 0.1uF to 10uF.
The external V
CC capacitor must be sized such that the
capacitor maintains a V
CC voltage greater than 7V during the
initial start-up. During a fault mode when the converter aux-
iliary winding is inactive, external current draw on the V
CC
line should be limited so the power dissipated in the start-up
regulator does not exceed the maximum power dissipation
of the controller.
An external start-up or other bias rail can be used instead of
the internal start-up regulator by connecting the V
CC and the
V
IN pins together and feeding the external bias voltage into
the two pins.
Line Under-Voltage Detector
The LM5041 contains a line Under-Voltage Lockout (UVLO)
circuit. An external set-point resistor divider from V
IN to
ground sets the operational range of the converter. The
divider must be designed such that the voltage at the UVLO
pin will be greater than 2.5V when V
IN is in the desired
operating range. If the Under-Voltage threshold is not met,
all functions of the controller are disabled and the controller
will enter a low-power state with input current <300µA.
ULVO hysteresis is accomplished with an internal 20µA cur-
rent source that is switched on or off into the impedance of
the set-point divider. When the UVLO threshold is exceeded,
the current source is activated to instantly raise the voltage
at the UVLO pin. When the UVLO pin falls below the 2.5V
threshold, the current source is turned off causing the volt-
age at the UVLO pin to fall. The UVLO pin can also be used
to implement a remote enable / disable function. By shorting
the UVLO pin to ground, the converter can be disabled. The
controller can also be disabled through the soft-start pin
(SS). The controller will enter a low-power off state if the SS
pin is forced below the 0.45V shutdown threshold.
Buck Stage Control Outputs
The LM5041 Buck switch maximum duty cycle clamp en-
sures that there will be sufficient off time each cycle to
recharge the bootstrap capacitor used in the high side gate
driver. The Buck switch is guaranteed to be off, and the sync
switch on, for at least 250ns per switching cycle. The Buck
stage control outputs (LD and HD) are CMOS buffers with
logic levels of 0 to 5V.
During any fault state or Under-Voltage off state, the buck
stage control outputs will default to HD low and LD high.
Push-Pull Outputs
The push pull outputs operate continuously at a nominal
50% duty cycle. A distinguishing feature of the LM5041 is the
ability to accurately configure either dead time (both-off) or
overlap time (both-on) on the complementary push-pull out-
puts. The overlap/dead time magnitude is controlled by a
resistor connected to the TIME pin on the controller. The
TIME pin holds one end of the resistor at 2.5V and the other
end of the resistor should be connected to either REF for
dead time control setting or to GND for overlap control. The
polarity of the current in the TIME is detected by the LM5041
The magnitude of the overlap/dead time can be calculated
as follows:
Overlap Time (ns) = (3.66 x R
SET)+7
Overlap Time in ns, R
SET connected to GND, RSET in k
Dead Time (ns) = (3.69 x R
SET)+21
Dead Time in ns, R
SET connected to REF, RSET in k
Recommended R
SET programming range: 10k
Ω to 100kΩ
Current-fed designs require a period of overlap to insure
there is a continuous path for the buck inductor current.
Voltage-fed designs require a period of dead time to insure
there is no time when the push-pull transformer acts as a
shorted turn to the low impedance sourcing node. The push-
pull outputs alternate continuously under all conditions pro-
vided REF the voltage is greater than 3V.
www.national.com
10


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