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LM66 Datasheet(PDF) 3 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor.
No. de pieza LM66
Descripción Electrónicos  Dual Output Internally Preset Thermostat
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Fabricante Electrónico  NSC [National Semiconductor (TI)]
Página de inicio  http://www.national.com
Logo NSC - National Semiconductor (TI)

LM66 Datasheet(HTML) 3 Page - National Semiconductor (TI)

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LM66 Electrical Characteristics
The following specifications apply for V
+ = 2.7 V
DC, and VREF load current = 50 µA unless otherwise specified. Boldface lim-
its apply for T
A =TJ =TMIN to TMAX; all other limits TA =TJ = 25˚C unless otherwise specified.
Symbol
Parameter
Conditions
Typical
Limits
Units
(Note 6)
(Note 7)
(Limits)
V
+ Power Supply
I
S
Supply Current
V
+ = +10V
250
µA (max)
V
+ = +2.7V
250
µA (max)
Digital Output(s)
I
OUT(“1”)
Logical “1” Output Leakage
Current
V
+ = +5.0V
1
µA (max)
V
OUT(“0”)
Logical “0” Output Voltage
I
OUT = +50 µA
0.4
V (max)
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is func-
tional, but do not guarantee specific performance limits. For guaranteed specifications and test conditions, see the Electrical Characteristics. The guaranteed speci-
fications apply only for the test conditions listed. Some performance characteristics may degrade when the device is not operated under the listed test conditions.
Note 2: When the input voltage (VI) at any pin exceeds the power supply (VI < GND or VI > V
+), the current at that pin should be limited to 5 mA. The 20 mA maxi-
mum package input current rating limits the number of pins that can safely exceed the power supplies with an input current of 5 mA to four.
Note 3: The maximum power dissipation must be derated at elevated temperatures and is dictated by TJmax (maximum junction temperature), θJA (junction to am-
bient thermal resistance) and TA (ambient temperature). The maximum allowable power dissipation at any temperature is PD =(TJmax–TA)/θJA or the number given
in the Absolute Maximum Ratings, whichever is lower. For this device, TJmax = 125˚C. For this device the typical thermal resistance (θJA) of the different package
types when board mounted follow:
Package Type
θ
JA
M08A
110˚C/W
Note 4: The human body model is a 100 pF capacitor discharge through a 1.5 k
Ω resistor into each pin. The machine model is a 200 pF capacitor discharged directly
into each pin.
Note 5: See AN450 “Surface Mounting Methods and Their Effects on Product Reliability” or the section titled “Surface Mount” found in any post 1986 National Semi-
conductor Linear Data Book for other methods of soldering surface mount devices.
Note 6: Typicals are at TJ =TA = 25˚C and represent most likely parametric norm.
Note 7: Limits are guaranteed to National’s AOQL (Average Outgoing Quality Level).
www.national.com
3


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