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ADP7183ACPZN1.0-R7 Datasheet(PDF) 5 Page - Analog Devices

No. de pieza ADP7183ACPZN1.0-R7
Descripción Electrónicos  Supported by ADIsimPOWER voltage regulator design tool
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ADP7183ACPZN1.0-R7 Datasheet(HTML) 5 Page - Analog Devices

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Data Sheet
ADP7183
Rev. 0 | Page 5 of 19
ABSOLUTE MAXIMUM RATINGS
Table 3.
Parameter
Rating
VIN to GND
+0.3 V to −6 V
VOUT to GND
+0.3 V to −VIN
EN to GND
+5.0 V to −6 V
VA to GND
+0.3 V to −6 V
VAFB to GND
+0.3 V to −6 V
VREG to GND
+0.3 V to −2.16 V
SENSE to GND
+0.3 V to −6 V
Storage Temperature Range
−65°C to +150°C
Operating Junction Temperature Range
−40°C to +125°C
Soldering Conditions
JEDEC J-STD-020
Stresses at or above those listed under Absolute Maximum
Ratings may cause permanent damage to the product. This is a
stress rating only; functional operation of the product at these
or any other conditions above those indicated in the operational
section of this specification is not implied. Operation beyond
the maximum operating conditions for extended periods may
affect product reliability.
THERMAL DATA
Absolute maximum ratings apply individually only, not in
combination. The ADP7183 can be damaged when the junction
temperature limits are exceeded. Monitoring ambient temperature
does not guarantee that TJ is within the specified temperature
limits. In applications with high power dissipation and poor
thermal resistance, the maximum ambient temperature may
have to be derated.
In applications with moderate power dissipation and low printed
circuit board (PCB) thermal resistance, the maximum ambient
temperature can exceed the maximum limit as long as the
junction temperature is within specification limits. The junction
temperature (TJ) of the device is dependent on the ambient
temperature (TA), the power dissipation of the device (PD), and
the junction to ambient thermal resistance of the package (θJA).
Use the following equation to calculate the junction temperature
(TJ) from the ambient temperature (TA) and power dissipation (PD):
TJ = TA + (PD × θJA)
The junction to ambient thermal resistance (θJA) of the package
is based on modeling and calculation using a 4-layer board. The
junction to ambient thermal resistance is highly dependent on
the application and board layout. In applications where high
maximum power dissipation exists, close attention to thermal
board design is required. The θJA value may vary, depending on
the PCB material, layout, and environmental conditions. The
specified θJA values are based on a 4-layer, 4 in. × 3 in. circuit board.
THERMAL RESISTANCE
Thermal performance is directly linked to printed circuit board
(PCB) design and operating environment. Careful attention to
PCB thermal design is required.
Table 4. Thermal Resistance
Package Type
θJA
θJC
Unit
CP-8-271
68.8
10.0
°C/W
1 Thermal impedance simulated values are based on JEDEC 2S2P thermal test
board with four thermal vias. See JEDEC JESD51.
ESD CAUTION


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