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MC908QL3C Datasheet(PDF) 51 Page - Motorola, Inc

No. de Pieza. MC908QL3C
Descripción  Microcontrollers
Descarga  222 Pages
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Fabricante  MOTOROLA [Motorola, Inc]
Página de inicio  http://www.freescale.com
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MC908QL3C Datasheet(HTML) 51 Page - Motorola, Inc

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I/O Signals
MC68HC908QL4 • MC68HC908QL3 • MC68HC908QL2 Data Sheet, Rev. 4
Freescale Semiconductor
51
break, the bit cannot change during the break state as long as BCFE is cleared. After the break, doing the
second step clears the status bit.
3.7 I/O Signals
The ADC10 module shares its pins with general-purpose input/output (I/O) port pins. See Figure 3-1 for
port location of these shared pins. The ADC10 on this MCU uses VDD and VSS as its supply and reference
pins. This MCU does not have an external trigger source.
3.7.1 ADC10 Analog Power Pin (VDDA)
The ADC10 analog portion uses VDDA as its power pin. In some packages, VDDA is connected internally
to VDD. If externally available, connect the VDDA pin to the same voltage potential as VDD. External filtering
may be necessary to ensure clean VDDA for good results.
NOTE
If externally available, route VDDA carefully for maximum noise immunity
and place bypass capacitors as near as possible to the package.
3.7.2 ADC10 Analog Ground Pin (VSSA)
The ADC10 analog portion uses VSSA as its ground pin. In some packages, VSSA is connected internally
to VSS. If externally available, connect the VSSA pin to the same voltage potential as VSS.
In cases where separate power supplies are used for analog and digital power, the ground connection
between these supplies should be at the VSSA pin. This should be the only ground connection between
these supplies if possible. The VSSA pin makes a good single point ground location.
3.7.3 ADC10 Voltage Reference High Pin (VREFH)
VREFH is the power supply for setting the high-reference voltage for the converter. In some packages,
VREFH is connected internally to VDDA. If externally available, VREFH may be connected to the same
potential as VDDA, or may be driven by an external source that is between the minimum VDDA spec and
the VDDA potential (VREFH must never exceed VDDA).
NOTE
Route VREFH carefully for maximum noise immunity and place bypass
capacitors as near as possible to the package.
AC current in the form of current spikes required to supply charge to the capacitor array at each
successive approximation step is drawn through the VREFH and VREFL loop. The best external component
to meet this current demand is a 0.1
µF capacitor with good high frequency characteristics. This capacitor
is connected between VREFH and VREFL and must be placed as close as possible to the package pins.
Resistance in the path is not recommended because the current will cause a voltage drop which could
result in conversion errors. Inductance in this path must be minimum (parasitic only).
3.7.4 ADC10 Voltage Reference Low Pin (VREFL)
VREFL is the power supply for setting the low-reference voltage for the converter. In some packages,
VREFL is connected internally to VSSA. If externally available, connect the VREFL pin to the same voltage
potential as VSSA. There will be a brief current associated with VREFL when the sampling capacitor is


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