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MC908QL2V Datasheet(PDF) 40 Page - Motorola, Inc

No. de Pieza. MC908QL2V
Descripción  Microcontrollers
Descarga  222 Pages
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Fabricante  MOTOROLA [Motorola, Inc]
Página de inicio  http://www.freescale.com
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MC908QL2V Datasheet(HTML) 40 Page - Motorola, Inc

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Memory
MC68HC908QL4 • MC68HC908QL3 • MC68HC908QL2 Data Sheet, Rev. 4
40
Freescale Semiconductor
2.6.5 FLASH Protection
Due to the ability of the on-board charge pump to erase and program the FLASH memory in the target
application, a provision is made to protect blocks of memory from unintentional erase or program
operations due to system malfunction. This protection is done by use of a FLASH block protect register
(FLBPR). The FLBPR determines the range of the FLASH memory which is to be protected. The range
of the protected area starts from a location defined by FLBPR and ends to the bottom of the FLASH
memory ($FFFF). When the memory is protected, the HVEN bit cannot be set in either erase or program
operations.
NOTE
In performing a program or erase operation, the FLASH block protect
register must be read after setting the PGM or ERASE bit and before
asserting the HVEN bit.
When the FLBPR is programmed with all 0 s, the entire memory is protected from being programmed and
erased. When all the bits are erased (all 1’s), the entire memory is accessible for program and erase.
When bits within the FLBPR are programmed, they lock a block of memory. The address ranges are
shown in 2.6.6 FLASH Block Protect Register. Once the FLBPR is programmed with a value other than
$FF, any erase or program of the FLBPR or the protected block of FLASH memory is prohibited. Mass
erase is disabled whenever any block is protected (FLBPR does not equal $FF). The FLBPR itself can be
erased or programmed only with an external voltage, VTST, present on the IRQ pin. This voltage also
allows entry from reset into monitor mode.
2.6.6 FLASH Block Protect Register
The FLASH block protect register is implemented as a byte within the FLASH memory, and therefore can
only be written during a programming sequence of the FLASH memory. The value in this register
determines the starting address of the protected range within the FLASH memory.
BPR[7:0] — FLASH Protection Register Bits [7:0]
These eight bits in FLBPR represent bits [13:6] of a 16-bit memory address. Bits [15:14] are 1s and
bits [5:0] are 0s.
The resultant 16-bit address is used for specifying the start address of the FLASH memory for block
protection. The FLASH is protected from this start address to the end of FLASH memory, at $FFFF.
With this mechanism, the protect start address can be $XX00, $XX40, $XX80, or $XXC0 within the
FLASH memory. See Figure 2-6 and Table 2-2.
Bit 7
654321
Bit 0
Read:
BPR7
BPR6
BPR5
BPR4
BPR3
BPR2
BPR1
BPR0
Write:
Reset:
Unaffected by reset. Initial value from factory is $FF.
Write to this register is by a programming sequence to the FLASH memory.
Figure 2-5. FLASH Block Protect Register (FLBPR)


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