Motor de Búsqueda de Datasheet de Componentes Electrónicos |
|
ADUC831 Datasheet(PDF) 62 Page - Analog Devices |
|
ADUC831 Datasheet(HTML) 62 Page - Analog Devices |
62 / 76 page REV. 0 –62– ADuC831 As an alternative to providing two separate power supplies, the user can help keep AVDD quiet by placing a small series resistor and/or ferrite bead between it and DVDD, and then decoupling AVDD separately to ground. An example of this configuration is shown in Figure 61. With this configuration other analog circuitry (such as op amps, voltage reference, and so on) can be powered from the AVDD supply line as well. The user will still want to include back-to-back Schottky diodes between AVDD and DVDD in order to protect from power-up and power-down transient con- ditions that could separate the two supply voltages momentarily. DVDD ADuC831 AGND AVDD 0.1 F 10 F 10 F DGND 0.1 F DIGITAL SUPPLY – + BEAD 1.6V Figure 61. External Single-Supply Connections Notice that in both Figure 60 and Figure 61, a large value (10 µF) reservoir capacitor sits on DVDD and a separate 10 µF capacitor sits on AVDD. Also, local small-value (0.1 µF) capacitors are located at each VDD pin of the chip. As per standard design practice, be sure to include all of these capacitors, and ensure the smaller capacitors are close to each AVDD pin with trace lengths as short as possible. Connect the ground terminal of each of these capacitors directly to the underlying ground plane. Finally, it should also be noted that, at all times, the analog and digital ground pins on the ADuC831 must be referenced to the same system ground reference point. Power Consumption The currents consumed by the various sections of the ADuC831 are shown in Table XXXIII. The CORE values given represent the current drawn by DVDD, while the rest (ADC, DAC, voltage ref) are pulled by the AVDD pin and can be disabled in software when not in use. The other on-chip peripherals (watchdog timer, power supply monitor, and so on) consume negligible current and are therefore lumped in with the Core operating current here. Of course, the user must add any currents sourced by the parallel and serial I/O pins, and that sourced by the DAC, in order to determine the total current needed at the ADuC831’s supply pins. Also, current drawn from the DVDD supply will increase by approximately 10 mA during Flash/EE erase and program cycles. Table XXXIII. Typical IDD of Core and Peripherals VDD = 5 V VDD = 3 V Core: (Normal Mode) (1.6 nAs MCLK) + (0.8 nAs MCLK) + 6 mA 3 mA Core: (Idle Mode) (0.75 nAs MCLK) + (0.25 nAs MCLK)+ 5 mA 3 mA ADC: 1.3 mA 1.0 mA DAC (Each): 250 µA 200 µA Voltage Ref: 200 µA 150 µA Since operating DVDD current is primarily a function of clock speed, the expressions for CORE supply current in Table XXXIII are given as functions of MCLK, the oscillator frequency. Plug in a value for MCLK in hertz to determine the current consumed by the core at that oscillator frequency. Since the ADC and DACs can be enabled or disabled in software, add only the currents from the peripherals you expect to use. And again, do not forget to include current sourced by I/O pins, serial port pins, DAC outputs, and so forth, plus the additional current drawn during Flash/EE erase and program cycles. A software switch allows the chip to be switched from normal mode into idle mode, and also into full power-down mode. Below are brief descriptions of power-down and idle modes. Power Saving Modes In idle mode, the oscillator continues to run but is gated off to the core only. The on-chip peripherals continue to receive the clock, and remain functional. Port pins and DAC output pins retain their states in this mode. The chip will recover from idle mode upon receiving any enabled interrupt, or on receiving a hardware reset. In full power-down mode, the on-chip oscillator stops and all on-chip peripherals are shut down. Port pins retain their logic levels in this mode, but the DAC output goes to a high-impedance state (three-state). During full power-down mode, the ADuC831 consumes a total of approximately 15 µA. There are five ways of terminating power-down mode: Asserting the RESET Pin (Pin 15) Returns to normal mode. All registers are set to their default state and program execution starts at the reset vector once the Reset pin is de-asserted. Cycling Power All registers are set to their default state and program execution starts at the reset vector approximately 128 ms later. Time Interval Counter (TIC) Interrupt Power-down mode is terminated and the CPU services the TIC interrupt. The RETI at the end of the TIC ISR will return the core to the instruction after that which enabled power-down. I 2C or SPI Interrupt Power-down mode is terminated and the CPU services the I 2C/SPI interrupt. The RETI at the end of the ISR will return the core to the instruction after that which enabled power-down. It should be noted that the I 2C/SPI power down interrupt enable bit (SERIPD) in the PCON SFR must first be set to allow this mode of operation. INT0 Interrupt Power-down mode is terminated and the CPU services the INT0 interrupt. The RETI at the end of the ISR will return the core to the instruction after that which enabled power-down. It should be noted that the INT0 power-down interrupt enable bit (INT0PD) in the PCON SFR must first be set to allow this mode of operation. Power-On Reset An internal POR (Power-On Reset) is implemented on the ADuC831. For DVDD below 2.45 V, the internal POR will hold the ADuC831 in reset. As DVDD rises above 2.45 V an internal timer will timeout for approximately 128 ms before the part is released from reset with a 16 MHz crystal. With other crystal values the timeout will increase. The user must ensure that the power supply has reached a stable 2.7 V minimum level by this time. Likewise on power-down, the internal POR will hold the ADuC831 in reset until the power supply has dropped below 1 V. Figure 62 illustrates the operation of the internal POR in detail. |
Número de pieza similar - ADUC831 |
|
Descripción similar - ADUC831 |
|
|
Enlace URL |
Política de Privacidad |
ALLDATASHEET.ES |
¿ALLDATASHEET es útil para Ud.? [ DONATE ] |
Todo acerca de Alldatasheet | Publicidad | Contáctenos | Política de Privacidad | Intercambio de Enlaces | Lista de Fabricantes All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |