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CS5540-AS Datasheet(PDF) 11 Page - Cirrus Logic |
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CS5540-AS Datasheet(HTML) 11 Page - Cirrus Logic |
11 / 22 page CS5540 DS503PP1 11 2.2 Voltage Reference Input The differential voltage between VREF+ and VREF- sets the nominal full scale input span of the converter. For a single-ended reference voltage, the reference output is connected to the VREF+ pin of the CS5540 and the ground reference is connected to the VREF- pin. Note that the differential refer- ence voltage can be from 0.1 V to ((VA+)- (VA-)). The noise-free resolution of a single sample from the ADC is directly proportional to the voltage ref- erence as depicted in Figure 5. Note: When a lower reference voltage is used, the resulting code widths are smaller. Since the output codes exhibit more changing codes for a fixed amount of noise, the converter appears noisier. 2.2.1 Voltage Reference Input Model Figure 6 illustrates the input models for the VREF pins. It includes a coarse/fine charge buffer which reduces the dynamic current demand of the exter- nal reference. The reference’s buffer is designed to accommodate rail-to-rail (common-mode plus sig- nal) input voltages. Typical CVF (sampling) cur- rent is about 16 nA (MCLK = 32.768 kHz). 13 14 15 16 17 18 19 0 0.5 1 1.5 2 2.5 3 VREF (V) Figure 5. Typical Noise-Free Resolution vs. Voltage Reference Noise-Free Res. = log2 (Bipolar Span/6.6*RMS Noise) Figure 6. Input model for VREF+ and VREF- pins VREF C = 12 pF f = 2*MCLK = 65.536 kHz φ Coarse 2 φ Fine 1 i n = CVosf V os ≤ 25mV |
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