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AD7779ACPZ Datasheet(PDF) 11 Page - Analog Devices |
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AD7779ACPZ Datasheet(HTML) 11 Page - Analog Devices |
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11 / 101 page  AD7779 Data Sheet Rev. A | Page 10 of 100 DOUTx TIMING CHARACTERISTISTICS AVDD1x/AVSSx = ±1.65 V, 3.3 V/AGND, AVDD2 − AVSSx = 2.2 V to 3.6 V; IOVDD = 1.8 V to 3.6 V; DGND = 0 V, REFx+/REFx− = 2.5 V (internal/external), MCLK = 8192 kHz; all specifications at TMIN to TMAX, unless otherwise noted. Table 2. Parameter Description1 Test Conditions/Comments Min Typ Max Unit t1 MCLK frequency 50:50 0.655 8.192 MHz t2 MCLK low time 60 ns t3 MCLK high time 60 ns t4 DCLKx high time MCLK/2 121 ns t5 DCLKx low time MCLK/2 121 ns t6 MCLK falling edge to DCLK rising edge 45 ns t7 MCLK falling edge to DCLK falling edge 45 ns t8 DCLKx rising edge to DRDY rising edge 2 ns t9 DCLKx rising edge to DRDY falling edge 1 ns t10 DOUTx setup time 20 ns t11 DOUTx hold time 20 ns 1 All input signals are specified with tR = tF = 1 ns/V (10% to 90% of IOVDD) and timed from a voltage level of (VIL + VIH)/2. MCLK DCLK DRDY LSB MSB MSB – 1 LSB + 1 LSB DOUTx t2 t4 t5 t6 t7 t10 t11 t8 t9 t1 t3 Figure 2. Data Interface Timing Diagram |
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