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AD5170BRM100-RL7 Datasheet(Hoja de datos) 3 Page - Analog Devices

No. de Pieza. AD5170BRM100-RL7
Descripción  256-Position Two-Time Programmable I2C Digital Potentiometer
Descarga  24 Pages
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Fabricante  AD [Analog Devices]
Página de inicio  http://www.analog.com
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AD5170
Rev. A | Page 3 of 24
ELECTRICAL CHARACTERISTICS — 2.5 kΩ
VDD = 5 V ± 10% or 3 V ±10%, VA = +VDD, VB = 0 V, –40°C < TA < +125°C, unless otherwise noted.
Table 1.
Parameter
Symbol
Conditions
Min
Typ1
Max
Unit
DC CHARACTERISTICS—RHEOSTAT MODE
Resistor Differential Nonlinearity2
R-DNL
RWB, VA = no connect
–2
±0.1
+2
LSB
Resistor Integral Nonlinearity2
R-INL
RWB, VA = no connect
–6
±0.75
+6
LSB
Nominal Resistor Tolerance3
∆RAB
TA = 25°C
–20
+55
%
Resistance Temperature Coefficient
(∆RAB/RAB)/∆T
VAB = VDD, Wiper = no connect
35
ppm/°C
RWB (Wiper Resistance)
RWB
Code = 0x00, VDD = 5 V
160
200
DC CHARACTERISTICS — POTENTIOMETER DIVIDER MODE (Specifications apply to all VRs)
Differential Nonlinearity4
DNL
–1.5
±0.1
+1.5
LSB
Integral Nonlinearity4
INL
–2
±0.6
+2
LSB
Voltage Divider Temperature Coefficient
(∆VW/VW)/∆T
Code = 0x80
15
ppm/°C
Full-Scale Error
VWFSE
Code = 0xFF
–10
–2.5
0
LSB
Zero-Scale Error
VWZSE
Code = 0x00
0
2
10
LSB
RESISTOR TERMINALS
Voltage Range5
VA,VB,VW
GND
VDD
V
Capacitance6 A, B
CA, CB
f = 1 MHz, measured to GND, code = 0x80
45
pF
Capacitance W
CW
f = 1 MHz, measured to GND, code = 0x80
60
pF
Shutdown Supply Current7
IA_SD
VDD = 5.5 V
0.01
1
µA
Common-Mode Leakage
ICM
VA = VB = VDD/2
1
nA
DIGITAL INPUTS AND OUTPUTS
Input Logic High
VIH
VDD = 5 V
2.4
V
Input Logic Low
VIL
VDD = 5 V
0.8
V
Input Logic High
VIH
VDD = 3 V
2.1
V
Input Logic Low
VIL
VDD = 3 V
0.6
V
Input Current
IIL
VIN = 0 V or 5 V
±1
µA
Input Capacitance5
CIL
5
pF
POWER SUPPLIES
Power Supply Range
VDD RANGE
2.7
5.5
V
OTP Supply Voltage
VDD_OTP
TA = 25°C
5.25
5.5
V
Supply Current
IDD
VIH = 5 V or VIL = 0 V
3.5
6
µA
OTP Supply Current
IDD_OTP
VDD_OTP = 5.5 V, TA = 25°C
100
mA
Power Dissipation8
PDISS
VIH = 5 V or VIL = 0 V, VDD = 5 V
30
µW
Power Supply Sensitivity
PSS
VDD = 5 V ± 10%, Code = midscale
±0.02
±0.08
%/%
DYNAMIC CHARACTERISTICS9
Bandwidth –3 dB
BW_2.5K
Code = 0x80
4.8
MHz
Total Harmonic Distortion
THDW
VA = 1 V rms, VB = 0 V, f = 1 kHz
0.1
%
VW Settling Time
tS
VA = 5 V, VB = 0 V, ±1 LSB error band
1
µs
Resistor Noise Voltage Density
eN_WB
RWB = 1.25 kΩ, RS = 0
3.2
nV/√Hz
1 Typical specifications represent average readings at 25°C and VDD = 5 V.
2 Resistor position nonlinearity error, R-INL, is the deviation from an ideal value measured between the maximum resistance and the minimum resistance wiper
positions. R-DNL measures the relative step change from ideal between successive tap positions. Parts are guaranteed monotonic.
3 VAB = VDD, Wiper (VW) = no connect.
4 INL and DNL are measured at VW with the RDAC configured as a potentiometer divider similar to a voltage output D/A converter. VA = VDD and VB = 0 V.
DNL specification limits of ±1 LSB maximum are guaranteed monotonic operating conditions.
5 Resistor terminals A, B, W have no limitations on polarity with respect to each other.
6 Guaranteed by design and not subject to production test.
7 Measured at the A terminal. The A terminal is open circuited in shutdown mode.
8 PDISS is calculated from (IDD × VDD). CMOS logic level inputs result in minimum power dissipation.
9 All dynamic characteristics use VDD = 5 V.




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