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AM438x Datasheet(PDF) 6 Page - Texas Instruments |
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AM438x Datasheet(HTML) 6 Page - Texas Instruments |
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6 / 18 page  ARM Cortex-A9 Up to 1000 MHz 32KB, 32KB L1 256KB L2, L3 RAM 64KB RAM Secure Boot 256KB L3 RAM Touchscreen Controller (TSC) (A) Display L3 and L4 Interconnect I C x3 2 UART x6 System Interface EDMA Timers x12 WDT RTC eHRPWM x6 eQEP, eCAP x3 JTAG, ETB 32b LPDDR2, DDR3, DDR3L On-the-Fly Encryption (B) NAND, NOR, Async (16-bit ECC) Memory Interface SPI x5 QSPI HDQ, 1-Wire ADC0 (8 inputs) 12-bit SAR (A) GPIO Camera Interface (2x Parallel) MMC, SD, SDIO x3 USB 2.0 Dual-Role + PHY x2 McASP x2 (4ch) 24-bit LCDCtrl (WXGA) ISO7816 Interface x2 Enclosure Protect Crypto Blocks Tamper Protection Secure Storage On-the-Fly Encryption Security EMAC switch 10, 100, 1G with 1588 (MII, RMII, RGMII, and MDIO) Graphics PowerVR SGX 3D GFX 20 MTri/s TM Processing: Overlay, Resizing,Color Space Conversion, and more Magnetic Card Reader Copyright © 2017, Texas Instruments Incorporated Quad Core PRU-ICSS 6 AM4382, AM4384, AM4388 SPRT726A – MARCH 2017 – REVISED APRIL 2017 www.ti.com Submit Documentation Feedback Product Folder Links: AM4382 AM4384 AM4388 Device Overview Copyright © 2017, Texas Instruments Incorporated 1.4 Functional Block Diagram A. Use of TSC limits available ADC0 inputs. B. Maximum clock: LPDDR2 = 266 MHz; DDR3/DDR3L = 400 MHz. Figure 1-1. Functional Block Diagram |
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Descripción similar - AM438x |
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