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TMP112 Datasheet(Hoja de datos) 9 Page - Texas Instruments

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No. de Pieza. TMP112
Descripción  Low-Power Digital Temperature Sensor With SMBus and Two-Wire Serial Interface in SOT563
Descarga  30 Pages
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Fabricante  TI1 [Texas Instruments]
Página de inicio  http://www.ti.com
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TMP102
www.ti.com
SBOS397F – AUGUST 2007 – REVISED DECEMBER 2015
Table 3. 13-Bit Temperature Data Format
TEMPERATURE (°C)
DIGITAL OUTPUT (BINARY)
HEX
150
0 1001 0110 0000
0960
128
0 1000 0000 0000
0800
127.9375
0 0111 1111 1111
07FF
100
0 0110 0100 0000
0640
80
0 0101 0000 0000
0500
75
0 0100 1011 0000
04B0
50
0 0011 0010 0000
0320
25
0 0001 1001 0000
0190
0.25
0 0000 0000 0100
0004
0
0 0000 0000 0000
0000
–0.25
1 1111 1111 1100
1FFC
–25
1 1110 0111 0000
1E70
–55
1 1100 1001 0000
1C90
7.3.2 Serial Interface
The TMP102 device operates as a slave device only on the two-wire bus and SMBus. Connections to the bus
are made through the open-drain I/O lines, SDA and SCL. The SDA and SCL pins feature integrated spike
suppression filters and Schmitt triggers to minimize the effects of input spikes and bus noise. The TMP102
device supports the transmission protocol for both fast (1 kHz to 400 kHz) and high-speed (1 kHz to 2.85 MHz)
modes. All data bytes are transmitted MSB first.
7.3.3 Bus Overview
The device that initiates the transfer is called a master, and the devices controlled by the master are called
slaves. The bus must be controlled by a master device that generates the serial clock (SCL), controls the bus
access, and generates the START and STOP conditions.
To address a specific device, a START condition is initiated, indicated by pulling the data-line (SDA) from a high
to low logic level when SCL is high. All slaves on the bus shift in the slave address byte on the rising edge of the
clock, with the last bit indicating whether a read or write operation is intended. During the ninth clock pulse, the
slave being addressed responds to the master by generating an acknowledge and by pulling SDA pin low.
A data transfer is then initiated and sent over eight clock pulses followed by an acknowledge bit. During the data
transfer the SDA pin must remain stable when SCL is high, because any change in SDA pin when SCL pin is
high is interpreted as a START signal or STOP signal.
When all data have been transferred, the master generates a STOP condition indicated by pulling SDA pin from
low to high, when the SCL pin is high.
7.3.4 Serial Bus Address
To communicate with the TMP102, the master must first address slave devices via a slave address byte. The
slave address byte consists of seven address bits, and a direction bit indicating the intent of executing a read or
write operation.
The TMP102 features an address pin to allow up to four devices to be addressed on a single bus. Table 4
describes the pin logic levels used to properly connect up to four devices.
Copyright © 2007–2015, Texas Instruments Incorporated
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