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INPUT AND OUTPUT EQUIVALENT CIRCUIT

PIN DESCRIPTION

TRUTH TABLE

X : Don‘t Care

Z : High Impedance

* : Q outputs are latched at the time when the LE input is taken low

logic level.

IEC LOGIC SYMBOLS

PIN No

SYMBOL

NAME AND FUNCTION

1

1OE

3 State Output Enable

Input (Active LOW)

2, 3, 5, 6, 8, 9,

11, 12

1Q0 to 1Q7 3-State Outputs

13, 14, 16, 17,

19, 20, 22, 23

2Q0 to 2Q7 3-State Outputs

24

2OE

3 State Output Enable

Input (Active LOW)

25

2LE

Latch Enable Input

36, 35, 33, 32,

30, 29, 27, 26

2D0 to 2D7 Data Inputs

47, 46, 44, 43,

41, 40, 38, 37

1D0 to 1D7 Data Inputs

48

1LE

Latch Enable Input

4, 10, 15, 21,

28, 34, 39, 45

GND

Ground (0V)

7, 18, 31, 42

Positive Supply Voltage

INPUTS

OUTPUT

OE

LE

D

Q

HX

X

Z

L

L

X

NO CHANGE *

LH

L

L

LH

H

H