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TPS60132 Datasheet(PDF) 5 Page - Texas Instruments |
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TPS60132 Datasheet(HTML) 5 Page - Texas Instruments |
5 / 26 page TPS60210, TPS60211, TPS60212, TPS60213 REGULATED 3.3 V, LOW RIPPLE CHARGE PUMP WITH ULTRALOW OPERATING CURRENT SLVS296 − JUNE 2000 5 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 detailed description (continued) constant-frequency mode When the output current is higher than the linskip current threshold, the charge pump runs continuously at the switching frequency fOSC. The control circuit, fed from the error amplifier, controls the charge on C1 and C2 by regulating the rDS(on) of the integrated MOSFET switches. When the output voltage decreases, the rDS(on) decreases as well, resulting in a larger voltage across the flying capacitors C1 and C2. This regulation scheme minimizes output ripple. Since the device switches continuously, the output ripple contains well-defined frequency components, and the circuit requires smaller external capacitors for a given output ripple. However, constant-frequency mode, due to higher operating current, is less efficient at light loads. For this reason, the device switches seamlessly into the pulse-skip mode when the output current drops below the linskip current threshold. pulse-skip mode The device enters the pulse-skip mode when the load current drops below the linskip current threshold of about 7 mA. In pulse-skip mode, the controller disables switching of the power stages when it detects an output voltage higher than 3.3 V. It skips switching cycles until the output voltage drops below 3.3 V. Then the controller reactivates the oscillator and switching of the power stages starts again. A 30-mV output voltage offset is introduced in this mode. The pulse-skip regulation mode minimizes operating current because it does not switch continuously and deactivates all functions except the voltage reference and error amplifier when the output is higher than 3.3 V. Even in pulse-skip mode the rDS(ON) of the MOSFETs is controlled. This way the energy per switching cycle that is transferred by the charge pump from the input to the output is limited to the minimum that is necessary to sustain a regulated output voltage, with the benefit that the output ripple is kept to a minimum. When switching is disabled in pulse-skip mode, the load is isolated from the input. start up, snooze mode, short circuit protection During start-up (i.e., when voltage is applied to the supply pin IN) the input is connected to the output until the output voltage reaches 0.8 x VI. When the start-up comparator detects this limit, the actual charge pump output stages are activated to boost the voltage higher than the input voltage. This precharging of the output current with a limited current ensures a short start-up time and avoids high inrush currents into an empty output capacitor. Driving SNOOZE low, programs the device into the snooze mode. In this mode, the converter will still maintain the output voltage at 3.3 V ±6%. The operating current in snooze mode, is however, drastically reduced to a typical value of 2 µA, while the output current is limited to a maximum of 2 mA. If the load current increases above 2 mA, the controller recognizes a further drop of the output voltage and the device enters the start-up mode to bring the voltage up to its nominal value again. However, it does not switch into the normal operating mode. The device limits short circuit currents to typically 60 mA. synchronization to an external clock signal The operating frequency of the charge pump is limited to 400 kHz in order to avoid troublesome interference problems in the sensitive 455-kHz IF band. The device can either run from the integrated oscillator, or an external clock signal can be used to drive the charge pump. The maximum frequency of the external clock signal is 800 kHz. The switching frequency used internally to drive the charge pump power stages is half of the external clock frequency. The external clock signal is applied to the SNOOZE-pin. The device will switch into the snooze mode if the signal on SNOOZE is held low for more than 10 µs. When the load current drops below the linskip current threshold, the device enters the pulse-skip mode but stays synchronized to the external clock signal. |
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