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TPS62290DRVT Datasheet(PDF) 7 Page - Texas Instruments |
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TPS62290DRVT Datasheet(HTML) 7 Page - Texas Instruments |
7 / 27 page Zero-Pole AMP. Integrator Error Amp PFMComp . +1% Voltagepositioning PWM Comp . VREF Control Stage GateDriver Anti Shoot-Through Current LimitComparator Current LimitComparator VREF+1% FB FB VIN GND MODE SW 1 EN VIN Softstart VOUT RAMP CONTROL Thermal Shutdown Reference 0.6VVREF Undervoltage Lockout1.8V Limit HighSide Limit LowSide Sawtooth Generator Int. Resistor Network FB RI1 RI..N Mode GND 2.25MHz Oscillator TPS62290, TPS62291, TPS62293 www.ti.com SLVS764F – JUNE 2007 – REVISED JANUARY 2016 8 Detailed Description 8.1 Overview The TPS6229x step down converters operate with typically 2.25-MHz fixed frequency pulse width modulation (PWM) mode at moderate to heavy load currents. At light load currents, the converters can automatically enter power save mode and operate then in pulse frequency modulation (PFM) mode. During PWM operation, the converters use a unique fast response voltage mode controller scheme with input voltage feed-forward to achieve good line and load regulation allowing the use of small ceramic input and output capacitors. At the beginning of each clock cycle initiated by the clock signal, the high side MOSFET switch is turned on. The current flows now from the input capacitor via the high side MOSFET switch through the inductor to the output capacitor and load. During this phase, the current ramps up until the PWM comparator trips and the control logic will turn off the switch. The current limit comparator also turns off the switch in case the current limit of the high side MOSFET switch is exceeded. After a dead time preventing shoot through current, the low side MOSFET rectifier is turned on and the inductor current ramps down. The current flows now from the inductor to the output capacitor and to the load. It returns to the inductor through the low side MOSFET rectifier. The next cycle is initiated by the clock signal again turning off the low side MOSFET rectifier and turning on the high side MOSFET switch. 8.2 Functional Block Diagram 8.3 Feature Description 8.3.1 Dynamic Voltage Positioning This feature reduces the voltage undershoots/overshoots at load steps from light to heavy load and vice versa. It is active in power save mode and regulates the output voltage 1% higher than the nominal value. This provides more headroom for both the voltage drop at a load step, and the voltage increase at a load throw-off. Copyright © 2007–2016, Texas Instruments Incorporated Submit Documentation Feedback 7 Product Folder Links: TPS62290 TPS62291 TPS62293 |
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