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TPS71202DRCTG4 Datasheet(PDF) 10 Page - Texas Instruments

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No. de pieza TPS71202DRCTG4
Descripción Electrónicos  Dual 250 mA Output, UltraLow Noise, High PSRR, Low-Dropout Linear Regulator
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Fabricante Electrónico  TI1 [Texas Instruments]
Página de inicio  http://www.ti.com
Logo TI1 - Texas Instruments

TPS71202DRCTG4 Datasheet(HTML) 10 Page - Texas Instruments

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C1 +
(3
105)
(R1 ) R2)
(R1
R2)
(pF)
V
OUT + VREF
1 )
R1
R2
R1 +
V
OUT
V
REF
* 1
R2
VOUT
1.225 V
1.5 V
2.5 V
3.0 V
3.3 V
4.75 V
R1/R3
Short
7.15 k
31.6 k
43.2 k
49.9 k
86.6 k
R2/R4
Open
30.1 k
30.1 k
30.1 k
30.1 k
30.1 k
Output Voltage Programming Guide
C1/C2
Open
100 pF
22 pF
15 pF
15 pF
15 pF
TPS71202
GND
EN2
FB2
NR
IN
OUT1
FB1
EN1
OUT2
V
IN
V
OUT1
V
OUT2
0.1
µF
2.2
µF
2.2
µF
0.01
µF
C1
R1
C2
R3
R2
R4
TPS71202, TPS71219
TPS71229, TPS71247
TPS71256, TPS71257
SBVS049D – MAY 2004 – REVISED AUGUST 2010
www.ti.com
PROGRAMMING THE TPS71202
ADJUSTABLE LDO REGULATOR
(3)
The output voltage of the TPS71202 dual adjustable
blank
regulator is programmed using an external resistor
The suggested value of this capacitor for several
divider, as shown in Figure 25. The output voltage is
resistor ratios is shown in Figure 25. If this capacitor
calculated using Equation 1:
is not used (such as in a unity-gain configuration) or if
an output voltage
≤ 1.8 V is chosen, then the
(1)
minimum recommended output capacitor is 4.7 mF
instead of 2.2 mF.
where VREF = 1.225 V (the internal reference
voltage).
DROPOUT VOLTAGE
Resistors
R2
and
R4
should
be
chosen
for
The TPS712xx uses a PMOS pass transistor to
approximately a 40 mA divider current. Lower value
achieve extremely low dropout. When (VIN - VOUT) is
resistors
can
be
used
for
improved
noise
less than the dropout voltage (VDO), the PMOS pass
performance, but will consume more power. Higher
device is in its linear region of operation and the
values should be avoided because leakage current at
input-to-output resistance is the RDS, ON of the PMOS
FB
increases
the
output
voltage
error.
The
pass element. Dropout voltages at lower currents can
recommended design procedure is to choose R2 =
be approximated by calculating the effective RDS, ON
30.1 k
Ω to set the divider current at 40 mA, and then
of the pass element and multiplying that resistance by
calculate R1 using Equation 2:
the load current. RDS, ON of the pass element can be
obtained by dividing the dropout voltage by the rated
output current. For the TPS71256, the RDS, ON of the
(2)
pass element is 84 m
Ω. The dropout voltage of the
To improve the stability and noise performance of the
TPS712xx will be less for higher output voltage
adjustable version, a small compensation capacitor
versions. This is because the PMOS pass element
can be placed between OUT and FB.
will have lower on-resistance due to increased gate
drive.
For voltages
≤ 1.8 V, the value of this capacitor
should be 100 pF. For voltages > 1.8 V, the
approximate value of this capacitor can be calculated
as Equation 3:
Figure 25. TPS71202 Adjustable LDO Regulator Programming
10
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Copyright © 2004–2010, Texas Instruments Incorporated
Product Folder Link(s): TPS71202 TPS71219 TPS71229 TPS71247 TPS71256 TPS71257


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