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S1M8662AX01-F0T0 Datasheet(Hoja de datos) 4 Page - Samsung semiconductor

No. de Pieza. S1M8662AX01-F0T0
Descripción  CDMA/PCS/GPS Triple Mode IF/ baseband IC
Descarga  22 Pages
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Fabricante  SAMSUNG [Samsung semiconductor]
Página de inicio  http://www.samsung.com/Products/Semiconductor
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 4 page
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S1M8662A (Preliminary)
RX IF/BBA WITH GPS
4
PIN DESCRIPTION
Pin No
Symbol
I/O
Description
1
VDDD
P
Power for the digital logic.
2
VDDA
P
Power input terminal for the analog circuit.
3
RAGC_CONT
AI
AGC gain control input. The input voltage is allowed up to VDDA.
It remains at High impedance during SLEEP.
4
5
GRX_IF1
GRX_IF2
AI
GPS IF input terminals, which have an input impedance of about
865W; generally, the GPS IF SAW filter is connected to them. When
these terminals are not used, they remain at High impedance.
6
7
CRX_IF1
CRX_IF2
AI
CDMA IF input terminals, which have an input impedance of about
865
Ω; generally, the CDMA IF SAW filter is connected to them. When
these terminals are not used, they remain at High impedance.
8
VDDA
P
Power input terminal for the analog circuit.
9
TCXO_out
DO
TCXO Clock output. division ratio : 1
10
VDDA
P
Power input terminal for the analog circuit.
11
VDDA
P
Power input terminal for the analog circuit.
12
13
Q_OFS
I_OFS
AI
Control DC input for removing the DC offset generated in the
S1M8662A and system during CDMA and GPS Mode. The control DC
is generated in the modem in PDM form, passes through the R-C filter
and is converted to DC, which is sent to this input terminal.
14
15
RXVCO_T1
RXVCO_T2
AI
Very sensitive terminal, which is connected to the oscillation L-C
resonance circuit.
Their impedance are about 2k
16
VDDA
P
Power input terminal for the analog circuit.
17
18
RXVCO_OUT1
RXVCO_OUT2
AO
Output for the PLL, able to output about -12dBm.
When this is not used, it remains at high impedance.
19
SPI_STB
DI
3-Line serial control. Strobe input port.
If this pin is opened, it remains at Low.
20
SPI_DATA
BI
3-Line serial control. DATA input/output port.
If this pin is opened, it remains at Low.
21
SPI_CLK
DI
3-Line serial control. CLOCK input/output port.
If this pin is opened, it remains at Low.
22
TCXO_in
AI/DI
Reference frequency input terminal connected to the VCTCXO output.
When this pin stops, only DC bias is delivered to maintain the DC
charge value of the capacitor connected externally
23
CHIPx8
DI
CHIPx8 Clock input port. CDMA/GPS ADC sampling clock from the
MSM.




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